An image sensor with stress adjusting layers and a method of fabrication the image sensor are disclosed. The image sensor includes a substrate with a front side surface and a back side surface opposite to the front side surface, an anti-reflective coating (ARC) layer disposed on the back side surface of the substrate, a dielectric layer disposed on the ARC layer, a metal layer disposed on the dielectric layer, and a stress adjusting layer disposed on the metal layer. The stress adjusting layer includes a silicon-rich oxide layer. The concentration profiles of silicon and oxygen atoms in the stress adjusting layer are non-overlapping and different from each other. The image sensor further includes oxide grid structure disposed on the stress adjusting layer.

A semiconductor device has a substrate. A semiconductor die including a photosensitive circuit is disposed over the substrate. A shield is disposed over the substrate and semiconductor die with a first opening of the shield disposed over the photosensitive circuit. An outer section of the shield is attached to the substrate and includes a second opening. An encapsulant is deposited over the substrate and semiconductor die. The encapsulant extends into the first opening and a first area between the shield and substrate while a second area over the photosensitive circuit remains devoid of the encapsulant.

A semiconductor device includes a semiconductor substrate, a photo sensing region, and a plurality of nanostructures. The semiconductor substrate has a first dopant. The photo sensing region is embedded in the semiconductor substrate, has a top surface level with a top surface of the semiconductor substrate, and has a second dopant that is of a different conductivity type than the first dopant. The plurality of nanostructures is on the photo sensing region and is made of a material the same as the photo sensing region.

An apparatus and method enabling a reduction in a resistance of a conductive path electrically connecting an upper substrate and a lower substrate. The apparatus includes a first semiconductor layer with element formation regions disposed adjacent to one another via element isolation regions, each of the element formation regions having a first active element, contact regions on an element isolation region side of a front layer portion of the element formation regions, conductive pads connected to the contact regions and extending across the element isolation region, a first insulating layer, a second semiconductor layer on the first insulating layer and having a second active element, a second insulating layer covering the second semiconductor layer, and conductive plugs extending from the second insulating layer to the conductive pad, the conductive plugs including a material identical to a material of the conductive pad and formed integrally with the conductive pad.

An image sensor device includes a substrate, photosensitive pixels, an interconnect structure, a dielectric layer, and a light blocking element. The photosensitive pixels are in the substrate. The interconnect structure is over a first side of the substrate. The dielectric layer is over a second side of the substrate opposite the first side of the substrate. The light blocking element has a first portion extending over a top surface of the dielectric layer and a second portion extending in the dielectric layer. The second portion of the light blocking element laterally surrounds the photosensitive pixels.

In some embodiments, the present disclosure relates to a method for forming an integrated chip (IC), including forming a plurality of image sensing elements including a first doping type within a substrate, performing a first removal process to form deep trenches within the substrate, the deep trenches separating the plurality of image sensing elements from one another, performing an epitaxial growth process to form an isolation epitaxial precursor including a first material within the deep trenches and to form a light absorbing layer including a second material different than the first material within the deep trenches and between sidewalls of the isolation epitaxial precursor, performing a dopant activation process on the light absorbing layer and the isolation epitaxial precursor to form a doped isolation layer including a second doping type opposite the first doping type, and filling remaining portions of the deep trenches with an isolation filler structure.

A method of manufacturing a package unit, comprising: preparing a circuit board having a first region, a second region surrounding the first region, and a third region between the first and the second region; preparing a mold having a frame-shaped protruding portion surrounding a first cavity, the frame-shaped protruding portion partitioning the first cavity and a second cavity surrounding the first cavity; arranging the circuit board and the mold such that the first region of the circuit board faces the first cavity, the second region of the circuit board faces the second cavity, and a gap which communicates the first cavity and the second cavity with each other is formed between the frame-shaped protruding portion and the third region of the circuit board; and forming a frame-shaped resin member on top of the second region of the circuit board by pouring a resin into the second cavity.

A photodetector device comprising n-type and p-type light absorbing regions arranged to form a pn-junction and n+ and p+ contact regions connected to respective contacts. The light absorbing regions and the contact regions are arranged in a sequence n+ p n p+ so that, after a voltage applied between the n+ and p+ contacts is switched from a reverse bias to a forward bias, electrons and holes which are generated in the light absorbing regions in response to photon absorption drift towards the p+ and n+ contact regions respectively, which causes current to start to flow between the contacts after a time delay which is inversely proportional to the incident light intensity.

A method of manufacturing a photo sensor includes forming a first conductive layer on a substrate, the first conductive layer including a metal layer and a transparent conductive oxide layer formed on the metal layer, forming a photoconductive layer on the first conductive layer, forming a second conductive layer on the photoconductive layer, forming a first photoresist pattern on the second conductive layer, etching the second conductive layer using the first photoresist pattern as an etch mask to form a second electrode, deforming the first photoresist pattern to form a second photoresist pattern, and etching the photoconductive layer and the first conductive layer using the second photoresist pattern to form a photoconductive pattern and a first electrode, respectively.

A method includes forming a dielectric layer over a first surface of a semiconductor layer, the dielectric layer including a metallization layer. The method includes forming an opening to expose a portion of the dielectric layer. The method includes forming a buffer oxide layer lining the opening. The method includes forming, according to a patternable layer, a recess in the buffer oxide layer partially extending from a second surface of the buffer oxide layer. The method includes removing the patternable layer. The method includes extending the recess through the buffer oxide layer and a portion of the dielectric layer to expose a portion of the metallization layer. The method includes filling the recess with a conductive material to form a pad structure configured to provide electrical connection to the metallization layer.