A silicon carbide semiconductor device, including a semiconductor substrate, and a first semiconductor region, a plurality of second semiconductor regions, a plurality of third semiconductor regions and a plurality of fourth semiconductor regions formed in the semiconductor substrate. The semiconductor device further includes a plurality of trenches penetrating the second, third and fourth semiconductor regions, a plurality of gate electrodes respectively provided via a plurality of gate insulating films in the trenches, a plurality of fifth semiconductor regions each provided between one of the gate insulating films at the inner wall of one of the trenches, and the third semiconductor region and the fourth semiconductor region through which the one trench penetrates. The semiconductor device further includes first electrodes electrically connected to the second, third and fourth semiconductor regions, and a second electrode provided on a second main surface of the semiconductor substrate.

An integrated circuit (IC) device comprises a high voltage semiconductor device (HVSD) on a frontside of a semiconductor body and further comprises an electrode on a backside of the semiconductor body opposite the frontside. The HVSD may, for example, be a transistor or some other suitable type of semiconductor device. The electrode has one or more gaps directly beneath the HVSD. The one or more gaps enhance the effectiveness of the electrode for improving the breakdown voltage of the HVSD.

A semiconductor device includes: a drift region of a first conductivity type arranged between first and second surfaces of a semiconductor body; a first region of the first conductivity type at the second surface; a second region of a second conductivity type arranged adjacent to the first region at the second surface, the second region including first and second sub-regions, the second sub-region arranged between the first sub-region and the second surface; and a first electrode on the second surface and arranged directly adjacent to the first region and the second sub-region. The first electrode is electrically connected to the drift region by the first region. The first sub-region protrudes, along a first lateral direction, over an interface or a separation region between the second sub-region and the first region. A part of the first region is confined by the first sub-region and the first electrode along a vertical direction.

A semiconductor apparatus includes: a semiconductor substrate; a diffusion layer; a first depletion prevention region; a channel stopper electrode, a monitor electrode and an insulating film. The inner edge portion of the monitor electrode is positioned between the diffusion layer and the first depletion prevention region. A distance between the outer edge portion of the channel stopper electrode and the inner edge portion of the monitor electrode is a first distance. A distance between the diffusion layer and the first depletion prevention region is a second distance. The first and second distances are set so that a discharge voltage between the channel stopper electrode and the monitor electrode becomes greater than an avalanche breakdown voltage at a PN junction portion of the diffusion layer and the semiconductor substrate.

An integrated electronic circuit including: a dielectric body delimited by a front surface; A top conductive region of an integrated electronic circuit extend within a dielectric body having a front surface. A passivation structure including a bottom portion and a top portion laterally delimits an opening. The bottom portion extends on the front surface, and the top portion extends on the bottom portion. A field plate includes an internal portion and an external portion. The internal portion is located within the opening and extends on the top portion of the passivation structure. The external portion extends laterally with respect to the top portion of the passivation structure and contacts at a bottom one of: the dielectric body or the bottom portion of the passivation structure. The opening and the external portion are arranged on opposite sides of the top portion of the passivation structure.

Semiconductor device structures and methods for manufacturing the same are provided. The semiconductor device structure includes a substrate, a first nitride semiconductor layer, a second nitride semiconductor layer, a barrier layer, a third nitride semiconductor layer and a gate structure. The first nitride semiconductor layer is disposed on the substrate. The second nitride semiconductor layer is disposed on the first nitride semiconductor layer and has a bandgap greater than that of the first nitride semiconductor layer. The barrier layer is disposed on the second nitride semiconductor layer and has a bandgap greater than that of the second nitride semiconductor layer. The third nitride semiconductor layer is doped with impurity and disposed on the barrier layer. The gate structure is disposed on the third nitride semiconductor layer.

A semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a pair of first electrodes, a second electrode, a doped nitride-based semiconductor layer, and a pair of gate electrodes. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer. The first and second nitride-based semiconductor layers collectively have an active portion and an electrically isolating portion that is non-semi-conducting and surrounds the active portion to form an interface therebetween. The first electrodes are disposed over the second nitride-based semiconductor layer. The second electrode are disposed over the second nitride-based semiconductor layer and between the first electrodes. The doped nitride-based semiconductor layer is disposed over the second nitride-based semiconductor layer and between the first electrodes and surrounding the second electrode. The gate electrodes are disposed over the doped nitride-based semiconductor layer and located at opposite sides of the second electrode.

A nitride-based semiconductor device includes a first and second nitride-based semiconductor layers, a doped III-V semiconductor layer, a gate electrode, a first and second source/drain (S/D) electrodes. The doped III-V semiconductor layer is disposed over the second nitride-based semiconductor layer and has first and second current-leakage barrier portions which extends downward from atop surface of the doped III-V semiconductor layer. The gate electrode is disposed above the doped III-V semiconductor layer, in which the gate electrode has a pair of opposite edges between the first and second current-leakage barrier portions. One of the edges of the gate electrode coincides with the first current-leakage barrier portion. The first current-leakage barrier portion is located between the first S/D electrode and the gate electrode. The second current-leakage barrier portion is located between the second S/D electrode and the gate electrode.

A semiconductor device includes a semiconductor substrate, a gate dielectric film formed on the semiconductor substrate, a gate electrode formed on the gate dielectric film, a field plate portion which is integrally formed with the gate electrode, a step insulating film in contact with the field plate portion, a high dielectric constant film in contact with the step insulating film and having a higher dielectric constant than silicon.

A semiconductor device includes a semiconductor substrate, a first gate oxide layer, and a first source/drain doped region. The first gate oxide layer is disposed on the semiconductor substrate, and the first gate oxide layer includes a main portion and an edge portion having a sloping sidewall. The first source/drain doped region is disposed in the semiconductor substrate and located adjacent to the edge portion of the first gate oxide layer. The first source/drain doped region includes a first portion and a second portion. The first portion is disposed under the edge portion of the first gate oxide layer in a vertical direction, and the second portion is connected with the first portion.