Patent classifications
H01L29/1602
METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR SUBSTRATE, METHOD FOR MANUFACTURING COMBINED SEMICONDUCTOR SUBSTRATE, COMBINED SEMICONDUCTOR SUBSTRATE, AND SEMICONDUCTOR-JOINED SUBSTRATE
A method for manufacturing a semiconductor substrate according to the present invention includes preparing a seed substrate containing a semiconductor material, forming an ion implanted layer at a certain depth from a front surface of a main surface of the seed substrate by implanting ions into the seed substrate, growing a semiconductor layer on the main surface of the seed substrate with a vapor-phase synthesis method, and separating a semiconductor substrate including the semiconductor layer and a part of the seed substrate by irradiating the front surface of the main surface of at least any of the semiconductor layer and the seed substrate with light.
SYNTHESIS AND PROCESSING OF PURE AND NV NANODIAMONDS AND OTHER NANOSTRUCTURES FOR QUANTUM COMPUTING AND MAGNETIC SENSING APPLICATIONS
Using processes disclosed herein, materials and structures are created and used. For example, processes can include melting amorphous carbon doped with nitrogen and carbon-13 into an undercooled state followed by quenching. Materials disclosed herein may include dopants in concentrations exceeding thermodynamic solubility limits.
POWER SUPPLY DEVICE
A power supply device includes a resistor that limits an electric current supplied from an AC power supply, a switching unit that is connected in parallel with the resistor, a rectifier circuit unit that is connected to a subsequent stage of the resistor and the switching unit and rectifies an AC voltage of the AC power supply, a booster circuit unit, a DC-voltage detection unit that detects a DC voltage output from the booster circuit unit, an AC voltage detection unit, a protection setting unit that compares a first protection voltage calculated on the basis of the boosting level by the booster circuit unit with a second protection voltage calculated based on the AC voltage detected by the AC-voltage detection unit and sets either one as a protection voltage, and a control unit that opens the switching unit when the DC voltage falls below the protection voltage and stops boosting.
Diamond Semiconductor System And Method
Disclosed herein is a new and improved system and method for fabricating diamond semiconductors. The method may include the steps of selecting a diamond semiconductor material having a surface, exposing the surface to a source gas in an etching chamber, forming a carbide interface contact layer on the surface; and forming a metal layer on the interface layer.
Doped Diamond SemiConductor and Method of Manufacture Using Laser Abalation
A doped diamond semiconductor and method of production using a laser is disclosed herein. As disclosed, a dopant and/or a diamond or sapphire seed material may be added to a graphite based ablative layer positioned below a confinement layer, the ablative layer also being graphite based and positioned above a backing layer, to promote formation of diamond particles having desirable semiconductor properties via the action of a laser beam upon the ablative layer. Dopants may be incorporated into the process to activate the reaction sought to produce a material useful in production of a doped semiconductor or a doped conductor suitable for the purpose of modulating the electrical, thermal or quantum properties of the material produced. As disclosed, the diamond particles formed by either the machine or method of confined pulsed laser deposition disclosed may be arranged as semiconductors, electrical components, thermal components, quantum components and/or integrated circuits.
Insulated Gate Structure, Wide Bandgap Material Power Device With the Same and Manufacturing Method Thereof
An insulated gate structure includes a wide bandgap material layer having a channel region of a first conductivity type. A gate insulating layer is arranged directly on the channel region and has a first nitride layer that is arranged directly on the channel region. The gate insulating layer has a concentration of carbon atoms that is less than 10.sup.18 atoms/cm.sup.−3 at a distance of 3 nm from an interface between the wide bandgap material layer and the first nitride layer. An electrically conductive gate electrode layer overlies the gate insulating layer so that the gate electrode layer is separated from the wide bandgap material layer by the gate insulating layer.
Systems and Methods for Fabricating Single-Crystalline Diamond Membranes
A buffer layer is employed to fabricate diamond membranes and allow reuse of diamond substrates. In this approach, diamond membranes are fabricated on the buffer layer, which in turn is disposed on a diamond substrate that is lattice-matched to the diamond membrane. The weak bonding between the buffer layer and the diamond substrate allows ready release of the fabricated diamond membrane. The released diamond membrane is transferred to another substrate to fabricate diamond devices, while the diamond substrate is reused for another fabrication.
SEMICONDUCTOR DEVICE
A semiconductor device includes: an n.sup.+-type drain region deposited at an upper part of a p-type semiconductor base body; an n-type drift region deposited to be in contact with the n.sup.+-type drain region; an n.sup.+-type source region opposed to the n.sup.+-type drain region with the n-type drift region interposed; a p-type gate region deposited to be in contact with the n-type drift region; an interlayer insulating film covering the n-type drift region; a resistive element having a spiral-like planar shape provided inside the interlayer insulating film; a drain electrode wire connected to the n.sup.+-type drain region and one end of the resistive element; a source electrode wire connected to the n.sup.+-type source region; a gate electrode wire connected to the p-type gate region; and a potential-dividing terminal wire connected to the resistive element, wherein a gap between the source electrode wire and an outermost circumference of the resistive element is constant.
SEMICONDUCTOR DEVICE
Provided is a semiconductor device according to an embodiment including an i-type or first-conductivity-type first diamond semiconductor layer having a first side surface, a second-conductivity-type second diamond semiconductor layer provided on the first diamond semiconductor layer and having a second side surface, a third diamond semiconductor layer being in contact with the first side surface and the second side surface, the third diamond semiconductor containing nitrogen, a first electrode electrically connected to the first diamond semiconductor layer, and a second electrode electrically connected to the second diamond semiconductor layer.
SUPER-JUNCTION SEMICONDUCTOR DEVICE WITH ENLARGED PROCESS WINDOW FOR DESIRABLE BREAKDOWN VOLTAGE
A super-junction semiconductor device with an enlarged process window for a desirable breakdown voltage includes: a semiconductor substrate and an epitaxial layer deposited on the semiconductor substrate. The epitaxial layer includes a first semiconductor layer, and a second semiconductor layer disposed on the first semiconductor layer. A band gap of the first semiconductor layer is greater than a band gap of the second semiconductor layer. A super-junction structure is formed in the epitaxial layer, including at least one first epitaxial pillar of a first dopant type, and at least one second epitaxial pillar of a second dopant type. The first epitaxial pillar and the second epitaxial pillar are alternately arranged along a transverse direction. The epitaxial layer has a sandwich structure.