A semiconductor device comprising a substrate, a channel layer over the substrate, an active layer over the channel layer and a laminate layer in contact with the active layer. The active layer has a band gap discontinuity with the channel layer.

A method for fabrication a field-effect-transistor includes forming a plurality of fin structures on a substrate, forming a gate structure across each fin structure and covering a portion of top and sidewall surfaces of the fin structure, forming a first doped layer, made of a first semiconductor material and doped with first doping ions, in each fin structure on one side of the corresponding gate structure, and forming a second doped layer, made of a second semiconductor material, doped with second doping ions, and having doping properties different from the first doped layer, in each fin structure on another side of the corresponding gate structure.

A method for fabrication a field-effect-transistor includes forming a plurality of fin structures on a substrate, forming a gate structure across each fin structure and covering a portion of top and sidewall surfaces of the fin structure, forming a first doped layer, made of a first semiconductor material and doped with first doping ions, in each fin structure on one side of the corresponding gate structure, and forming a second doped layer, made of a second semiconductor material, doped with second doping ions, and having doping properties different from the first doped layer, in each fin structure on another side of the corresponding gate structure.

A method for treating a compound semiconductor substrate, in which method in vacuum conditions a surface of an In-containing III-As, III-Sb or III-P substrate is cleaned from amorphous native oxides and after that the cleaned substrate is heated to a temperature of about 250-550° C. and oxidized by introducing oxygen gas onto the surface of the substrate. The invention relates also to a compound semiconductor substrate, and the use of the substrate in a structure of a transistor such as MOSFET.

A method for treating a compound semiconductor substrate, in which method in vacuum conditions a surface of an In-containing III-As, III-Sb or III-P substrate is cleaned from amorphous native oxides and after that the cleaned substrate is heated to a temperature of about 250-550° C. and oxidized by introducing oxygen gas onto the surface of the substrate. The invention relates also to a compound semiconductor substrate, and the use of the substrate in a structure of a transistor such as MOSFET.

A semiconductor device includes: a channel layer which is made of In.sub.pAl.sub.qGa.sub.1-p-qN (0≦p+q≦1, 0≦p, and 0≦q); a barrier layer which is formed on the channel layer and is made of In.sub.rAl.sub.sGa.sub.1-r-sN (0≦r+s≦1, 0≦r) having a bandgap larger than that of the channel layer; a diffusion suppression layer which is selectively formed on the barrier layer and is made of In.sub.tAl.sub.uGa.sub.1-t-uN (0≦t+u≦1, 0≦t, and s>u); a p-type conductive layer which is formed on the diffusion suppression layer and is made of In.sub.xAl.sub.yGa.sub.1-x-yN (0≦x+y≦1, 0≦x, and 0≦y) having p-type conductivity; and a gate electrode which is formed on the p-type conductive layer.

A transistor device includes a channel, a first source/drain region positioned on a first side of the channel, a second source/drain region positioned on a second side of the channel opposite the first side of the channel, and a tunnel barrier disposed between the channel and the first source/drain region, the tunnel barrier adapted to suppress band-to-band tunneling while the transistor device is in an off state.

A transistor device includes a channel, a first source/drain region positioned on a first side of the channel, a second source/drain region positioned on a second side of the channel opposite the first side of the channel, and a tunnel barrier disposed between the channel and the first source/drain region, the tunnel barrier adapted to suppress band-to-band tunneling while the transistor device is in an off state.

Photonic devices having Al.sub.1-xSc.sub.xN and Al.sub.yGa.sub.1-yN materials, where Al is Aluminum, Sc is Scandium, Ga is Gallium, and N is Nitrogen and where 0<x≤0.45 and 0≤y≤1.

A semiconductor structure includes: a channel layer; an active layer over the channel layer, wherein the active layer is configured to form a two-dimensional electron gas (2DEG) to be formed in the channel layer along an interface between the channel layer and the active layer; a gate electrode over a top surface of the active layer; and a source/drain electrode over the top surface of the active layer; wherein the active layer includes a first layer and a second layer sequentially disposed therein from the top surface to a bottom surface of the active layer, and the first layer possesses a higher aluminum (Al) atom concentration compared to the second layer. An HEMT structure and an associated method are also disclosed.