A semiconductor device with an active transistor cell comprising a p-type first and second base layers, surrounding an n-type source region, the device further comprising a plurality of first gate electrodes embedded in trench recesses, has additional gate runners formed adjacent to the first base layer, outside the active cell, and contacting the first gate electrodes at the cross points thereof. The additional gate runners do not affect the active cell design in terms of cell pitch i.e., the design rules for cell spacing, hole drainage between the cells, or gate-collector capacitance, hence resulting in optimum low conduction and switching losses. The transistor cell and layout designs offer a range of advantages both in terms of performance and manufacturability, with the potential of applying additional layers or structures.

Disclosures of the present invention mainly describe a two-dimensional semiconductor device (TDSD), comprising: a two-dimensional semiconductor material (TDSM) layer, a superacid action layer and a superacid solution. The TDSM layer is made of a transition-metal dichalcogenide, and the superacid action layer is formed on the TDSM layer. Particularly, an oxide material is adopted for making the superacid action layer, such that the superacid solution is subsequently applied to the superacid action layer so as to make the superacid solution gets into the superacid action layer by diffusion effect. Experimental data have proved that, letting the superacid solution diffuse into the superacid action layer can not only apply a chemical treatment to the TDSM layer, but also make the TDSD have a luminosity enhancement. Particularly, the luminosity enhancement would not be reduced even if the TDSD contacts with water and/or organic solution during other subsequent manufacturing processes.

A method of controlling an effective gate length in a vertical field effect transistor is provided. The method includes forming a vertical fin on a substrate, and forming a bottom spacer layer on the substrate adjacent to the vertical fin. The method further includes forming a dummy gate block adjacent to the vertical fin on the bottom spacer layer. The method further includes forming a top spacer adjacent to the vertical fin on the dummy gate block, and removing the dummy gate block to expose a portion of the vertical fin between the top spacer and bottom spacer layer. The method further includes forming an absorption layer on the exposed portion of the vertical fin. The method further includes heat treating the absorption layer and vertical fin to form a dopant modified absorption layer, and removing the dopant modified absorption layer.

Provided is a cadmium zinc telluride (CdZnTe) single crystal including a main surface that has a high mobility lifetime product (μτ product) in a wide range, wherein the main surface has an area of 100 mm.sup.2 or more and has 50% or more of regions where the μτ product is 1.0×10.sup.−3 cm.sup.2/V or more based on the entire main surface, and a method for effectively producing the same.

The invention provides a light emitting chip comprising a conductive carrier, a semiconductor layer body having a first semiconductor layer, a second semiconductor layer, and a radiation emitting layer, wherein the semiconductor layer has a concave part extending from the surface of the first semiconductor layer through the radiation emitting layer toward the second semiconductor layer; a first electrical connection layer electrically connected between the first semiconductor layer and the first electrode; a second electrical connection layer electrically connected between the second semiconductor layer and the conductive carrier, wherein the second electrical connection layer includes a continuous electrode structure connected to the second semiconductor layer, the continuous electrode structure being constituted by at least a frame structure distributed at the edge of the light emitting chip; and a second electrode electrically connected to the conductive carrier.

Disclosed herein are the use of materials that have high affinity for oxygen, oxygen getters (e.g. Al), in conjunction with group V dopants (e.g. As) in II-VI materials (e.g. CdTe, Cd(Se)Te), that enable p-type doping by reducing group V oxides found in as-grown II-VI materials, thereby freeing up the anionic form of the Group V element.

In some aspects, methods of forming a metal sulfide thin film are provided. According to some methods, a metal sulfide thin film is deposited on a substrate in a reaction space in a cyclical process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase sulfur reactant. In some aspects, methods of forming a three-dimensional architecture on a substrate surface are provided. In some embodiments, the method includes forming a metal sulfide thin film on the substrate surface and forming a capping layer over the metal sulfide thin film. The substrate surface may comprise a high-mobility channel.

Disclosures of the present invention mainly describe a two-dimensional semiconductor device (TDSD), comprising: a two-dimensional semiconductor material (TDSM) layer, a superacid action layer and a superacid solution. The TDSM layer is made of a transition-metal dichalcogenide, and the superacid action layer is formed on the TDSM layer. Particularly, an oxide material is adopted for making the superacid action layer, such that the superacid solution is subsequently applied to the superacid action layer so as to make the superacid solution gets into the superacid action layer by diffusion effect. Experimental data have proved that, letting the superacid solution diffuse into the superacid action layer can not only apply a chemical treatment to the TDSM layer, but also make the TDSD have a luminosity enhancement. Particularly, the luminosity enhancement would not be reduced even if the TDSD contacts with water and/or organic solution during other subsequent manufacturing processes.

In some aspects, methods of forming a metal sulfide thin film are provided. According to some methods, a metal sulfide thin film is deposited on a substrate in a reaction space in a cyclical process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase sulfur reactant. In some aspects, methods of forming a three-dimensional architecture on a substrate surface are provided. In some embodiments, the method includes forming a metal sulfide thin film on the substrate surface and forming a capping layer over the metal sulfide thin film. The substrate surface may comprise a high-mobility channel.

To provide a new GaN laminate obtained b growing a GaN layer on a GaN substrate by HVPE, including: a GaN substrate containing GaN single crystal and having a low index crystal plane as c-plane closest to a main surface; and a GaN layer epitaxially grown on the main surface of the GaN substrate wherein a surface of the GaN layer has a macro step-macro terrace structure in which a macro step and a macro terrace are alternately arranged, one of the macro step and the macro terrace has a step-terrace structure in which a step having a height of equal to or more than a plurality of molecular layers of GaN and extending in a direction orthogonal to m-axis direction, and a terrace are alternately arranged, and the other one of the macro step and the macro terrace has a step-terrace structure in which a step having a height of equal to or more than a plurality of molecular layers of GaN and extending in a direction orthogonal to a-axis direction, and a terrace are alternately arranged.