Patent classifications
H01L29/242
THIN-FILM PN JUNCTIONS AND APPLICATIONS THEREOF
Composite materials including a thin-film layer of lateral p-n junctions can be employed in circuits or various components of electrical devices. A composite material comprises a thin-film layer including p-type regions alternating with n-type regions along a face of the thin-film layer, the p-type regions comprising electrically conductive particles dispersed in a first organic carrier and the n-type regions comprising electrically conductive particles dispersed in a second organic carrier, wherein p-n junctions are established at interfaces between the p-type and n-type regions.
SEMICONDUCTOR DEVICE
An object is to provide a technology that can enhance electrical characteristics of a semiconductor device. A semiconductor device is a semiconductor device provided with a semiconductor element. The semiconductor device includes: an n-type single-crystal gallium oxide layer including a first main surface; an electrode disposed on the first main surface of the n-type single-crystal gallium oxide layer or above the first main surface, the electrode being an electrode of the semiconductor element; a p-type oxide semiconductor layer disposed between the n-type single-crystal gallium oxide layer and the electrode; and an amorphous gallium oxide layer disposed between the n-type single-crystal gallium oxide layer and the p-type oxide semiconductor layer.
Atomic precision control of wafer-scale two-dimensional materials
Embodiments of this disclosure include apparatus, systems, and methods for fabricating monolayers. In one example, a method includes forming a multilayer film having a plurality of monolayers of a two-dimensional (2D) material on a growth substrate. The multilayer film has a first side proximate the growth substrate and a second side opposite the first side.
Heterojunction devices and methods for fabricating the same
Current conducting devices and methods for their formation are disclosed. Described are vertical current devices that include a substrate, an n-type material layer, a plurality of p-type gates, and a source. The n-type material layer disposed on the substrate and includes a current channel. A plurality of p-type gates are disposed on opposite sides of the current channel. A source is disposed on a distal side of the current channel with respect to the substrate. The n-type material layer comprises beta-gallium oxide.
Heterojunction material and method of preparing the same
A method of preparing a heterojunction material, includes forming a first transition metal on a substrate, forming a second transition metal on the first transition metal, and performing a plasma process containing a chalcogen source on the substrate. The first transition metal and the second transition metal are different from each other.
Semiconductor device
An object is to provide a technology that can enhance electrical characteristics of a semiconductor device. A semiconductor device is a semiconductor device provided with a semiconductor element. The semiconductor device includes: an n-type single-crystal gallium oxide layer including a first main surface; an electrode disposed on the first main surface of the n-type single-crystal gallium oxide layer or above the first main surface, the electrode being an electrode of the semiconductor element; a p-type oxide semiconductor layer disposed between the n-type single-crystal gallium oxide layer and the electrode; and an amorphous gallium oxide layer disposed between the n-type single-crystal gallium oxide layer and the p-type oxide semiconductor layer.
SCHOTTKY DIODE
A Schottky diode comprises: a first electrode; a second electrode; and a body of semiconductive material connected to the first electrode at a first interface and connected to the second electrode at a second interface, wherein the first interface comprises a first planar region lying in a first plane and the first electrode has a first projection onto the first plane in a first direction normal to the first plane, the second interface comprises a second planar region lying in a second plane and the second electrode has a second projection onto the first plane in said first direction, at least a portion of the second projection lies outside the first projection, said second planar region is offset from the first planar region in said first direction, and one of the first interface and the second interface provides a Schottky contact.
Field-effect transistor with a total control of the electrical conductivity on its channel
The first object of the invention is directed to field-effect gate transistor comprising (a) a substrate, (b) a source terminal, (c) a drain terminal, and (d) a channel between the source terminal and the drain terminal, the channel being a layer of Cu.sub.xCr.sub.yO.sub.2 in which the y/x ratio is superior to 1. The field-effect gate transistor is remarkable in that the channel of Cu.sub.xCr.sub.yO.sub.2 presents a gradient of holes concentration. The second object of the invention is directed to a method for laser annealing a field-effect gate transistor in accordance with the first object of the invention.
HETEROJUNCTION METERIAL AND METHOD OF PREPARING THE SAME
A method of preparing a heterojunction material, includes forming a first transition metal on a substrate, forming a second transition metal on the first transition metal, and performing a plasma process containing a chalcogen source on the substrate. The first transition metal and the second transition metal are different from each other.
Power semiconductor device
An n-type semiconductor layer has a single-crystal structure and is made of a wide-gap semiconducting material. A p-type semiconductor layer is provided on the n-type semiconductor layer and made of a material different from the aforementioned wide-gap semiconducting material, and has either a microcrystalline structure or an amorphous structure. An electrode is provided on at least one of the n-type semiconductor layer and the p-type semiconductor layer.