A solar cell of an embodiment includes a p-electrode; an n-electrode; a p-type light-absorbing layer located between the p-electrode and the n-electrode and mainly containing a cuprous oxide; and an n-type layer located between the first n-type layer and the n-electrode, the n-type layer including a first n-type layer and a second n-type layer or a first n-type region and a second n-type region; wherein the first n-type layer and the first n-type region is located on the p-type light-absorbing layer side, the second n-type layer and the second n-type region is located on the n-electrode side, the first n-type layer and the first n-type region mainly contain a compound represented by Ga.sub.x1M1.sub.x2O.sub.x3, the M1 is one or more selected from the group consisting of Hf, Zr, In, Zn, Ti, Al, B, Sn, Si, and Ge, the x1, the x2, and the x3 are more than 0, and the x3 when a sum of the x1 and the x2 is 2 is 3.0 or more and 3.8 or less, the second n-type layer and the second n-type region mainly contain a compound represented by Ga.sub.y1Zn.sub.y2M2.sub.y3M3.sub.y4O.sub.y5, the M2 is one or more selected from the group consisting of Hf, Zr, In, Ti, Al, B, Si, and Ge, the M3 is Sn or/and Mg, the y1, the y2, the y3, and the y4 are 0 or more, a sum of the y3 and the y4 is more than 0, and the y5 when a sum of the y1, the y2, the y3, and the y4 is 2 is 2.2 or more and 3.6 or less.

A solar cell of an embodiment includes a p-electrode; an n-electrode; a p-type light-absorbing layer located between the p-electrode and the n-electrode and mainly containing a cuprous oxide; and an n-type layer located between the first n-type layer and the n-electrode, the n-type layer including a first n-type layer and a second n-type layer or a first n-type region and a second n-type region; wherein the first n-type layer and the first n-type region is located on the p-type light-absorbing layer side, the second n-type layer and the second n-type region is located on the n-electrode side, the first n-type layer and the first n-type region mainly contain a compound represented by Ga.sub.x1M1.sub.x2O.sub.x3, the M1 is one or more selected from the group consisting of Hf, Zr, In, Zn, Ti, Al, B, Sn, Si, and Ge, the x1, the x2, and the x3 are more than 0, and the x3 when a sum of the x1 and the x2 is 2 is 3.0 or more and 3.8 or less, the second n-type layer and the second n-type region mainly contain a compound represented by Ga.sub.y1Zn.sub.y2M2.sub.y3M3.sub.y4O.sub.y5, the M2 is one or more selected from the group consisting of Hf, Zr, In, Ti, Al, B, Si, and Ge, the M3 is Sn or/and Mg, the y1, the y2, the y3, and the y4 are 0 or more, a sum of the y3 and the y4 is more than 0, and the y5 when a sum of the y1, the y2, the y3, and the y4 is 2 is 2.2 or more and 3.6 or less.

The present invention relates to a method for obtaining a photovoltaic CZTS thin-film solar cell including arranging a precursor solution, preparing a substrate, and depositing said precursor solution on said substrate.

Preparation of two-dimensional indium selenide, other two-dimensional materials and related compositions via surfactant-free deoxygenated co-solvent systems.

Preparation of two-dimensional indium selenide, other two-dimensional materials and related compositions via surfactant-free deoxygenated co-solvent systems.

The present disclosure is a photoelectric conversion element including: a photoelectric conversion layer 5 including a first quantum dot 4a and a second quantum dot 4b, a ratio X of the number of heavy metal atoms to the number of oxygen group atoms is less than 2 on a surface of the nanoparticle of the first quantum dot 4a, the ratio X is greater than or equal to 2 on a surface of the nanoparticle of the second quantum dot 4b, and Equation (1) is satisfied:
0.3<N  (1),
where N denotes a ratio of the number of second quantum dots to the number of first quantum dots.

Provided are a method for preparing a high-performance wafer-level lead sulfide near infrared photosensitive thin film. Firstly, a surface of the selected substrate material is cleaned; next, a vaporized oxidant is introduced into a vacuum evaporation chamber under a high background vacuum degree, and a PbS thin film is deposited on the clean substrate surface to obtain a microstructure with medium particle, loose structure and consistent orientation. Finally, under a given temperature and pressure, a high-performance wafer-level PbS photosensitive thin film is obtained by sensitizing the film prepared at step S2 using iodine vapor carried by a carrier gas. This preparation method is simple, low-cost and repeatable. The PbS photosensitive thin film has a high photoelectric detection rate. The 600K blackbody room temperature peak detection rate is >8×1010 Jones. The corresponding non-uniformity in a wafer-level photosensitive surface is <5%, satisfying the requirements of preparation of a PbS Mega-pixel-level array imaging system.

A low cost IC solution is disclosed to provide Super CMOS microelectronics macros. Hereinafter, the Super CMOS or Schottky CMOS all refer to SCMOS. The SCMOS device solutions with a niche circuit element, the complementary low threshold Schottky barrier diode pairs (SBD) made by selected metal barrier contacts (Co/Ti) to P— and N—Si beds of the CMOS transistors. A DTL like new circuit topology and designed wide contents of broad product libraries, which used the integrated SBD and transistors (BJT, CMOS, and Flash versions) as basic components. The macros include diodes that are selectively attached to the diffusion bed of the transistors, configuring them to form generic logic gates, memory cores, and analog functional blocks from simple to the complicated, from discrete components to all grades of VLSI chips. Solar photon voltaic electricity conversion and bio-lab-on-a-chip are two newly extended fields of the SCMOS IC applications.

A low cost IC solution is disclosed to provide Super CMOS microelectronics macros. Hereinafter, the Super CMOS or Schottky CMOS all refer to SCMOS. The SCMOS device solutions with a niche circuit element, the complementary low threshold Schottky barrier diode pairs (SBD) made by selected metal barrier contacts (Co/Ti) to P— and N—Si beds of the CMOS transistors. A DTL like new circuit topology and designed wide contents of broad product libraries, which used the integrated SBD and transistors (BJT, CMOS, and Flash versions) as basic components. The macros include diodes that are selectively attached to the diffusion bed of the transistors, configuring them to form generic logic gates, memory cores, and analog functional blocks from simple to the complicated, from discrete components to all grades of VLSI chips. Solar photon voltaic electricity conversion and bio-lab-on-a-chip are two newly extended fields of the SCMOS IC applications.

The present disclosure relates to a solid-state light emitting device, a solid state light absorbing device and methods for fabricating the same. In particular, the present disclosure relates to a light emitting device comprising: a transition metal dichalcolgenide layer disposed between two layers of a material with a bandgap larger than the transition metal dichalcolgenide layer; a plurality of nanoparticles embedded into the transition metal dichalcolgenide layer and being arranged to form a plurality of allowable energy levels within the bandgap of the transition metal dichalcolgenide layer; and electrodes arranged to apply a voltage across the two layers and the transition metal dichalcolgenide layer; wherein, when a voltage within a predetermined range is applied to the electrodes, photons with a wavelength within a specific wavelength range are emitted by the device and the wavelength range can be varied by varying the voltage across the two layers and the transition metal dichalcolgenide layer.