Patent classifications
H01L31/03921
Solar cell
A bi-facial solar cell includes a silicon substrate, a first doped region formed on a front surface of the silicon substrate, an oxide layer formed on a back surface of the silicon substrate, a second doped region formed on the oxide layer and formed of a polycrystalline silicon layer, a first passivation layer formed on the first doped region, a first anti-reflection layer formed on the first passivation layer, a plurality of first finger electrodes connected to the first doped region through a first opening in the first passivation layer and the first anti-reflection layer, a second passivation layer formed on the second doped region, a second anti-reflection layer formed on the second passivation layer, and a plurality of second finger electrodes connected to the second doped region through a second opening in the second passivation layer and the second anti-reflection layer.
Crystallisation of amorphous silicon from a silicon-rich aluminium substrate
The invention relates to a method for manufacturing a semiconductor component comprising a thin layer of crystalline silicon on a substrate, comprising the steps of: providing a silicon-rich aluminum substrate (S0), depositing a thin layer of amorphous silicon on the substrate (S1), and applying thermal annealing (S2) to the thin layer of amorphous silicon to obtain a thin layer of crystalline silicon on the substrate.
HYDROGENATED AMORPHOUS SILICON DETECTOR
The invention refers to a detector based on 3D geometry made from a hydrogenated amorphous silicon substrate. This detector finds application in the detection of ionizing radiation.
PHOTOELECTRIC CONVERSION APPARATUS AND MANUFACTURING METHOD THEREFOR
A photoelectric conversion apparatus includes a semiconductor substrate having a first surface and a second surface, a plurality of photoelectric conversion regions including an impurity of a first conductivity type and arranged at the semiconductor substrate, a trench arranged between the photoelectric conversion regions, an impurity region including an impurity of a second conductivity type opposite to the first conductivity type and arranged along a sidewall of the trench, and a first film arranged at the first surface of the semiconductor substrate and the sidewall of the trench. The impurity region includes a first region with an impurity concentration of a first concentration and a second region with an impurity concentration of a second concentration lower than the first concentration, and a distance between the first surface and the first region is smaller than a distance between the first surface and the second region.
SOLAR CELL AND METHOD FOR MANUFACTURING SAME, AND SOLAR CELL MODULE
A solar cell includes a semiconductor substrate having a photoelectric conversion section, a first electrode, and a second electrode. The semiconductor substrate has a thickness of 70 μm or more and 200 μm or less. A chipping mark is present on an edge of at least one principal surface of the semiconductor substrate. The maximum length of the chipping mark along a side of the semiconductor substrate is 45 μm or less. The semiconductor substrate does not have a scribe mark due to laser irradiation. The solar cell can suppress a reduction in the fill factor.
SEMI-TRANSPARENT THIN-FILM PHOTOVOLTAIC DEVICE PROVIDED WITH AN OPTIMIZED METAL/NATIVE OXIDE/METAL ELECTRICAL CONTACT
A thin-film semi-transparent photovoltaic device comprising: a plurality of active photovoltaic zones, having a surface S.sub.5, formed of: a transparent substrate; a front electrode formed of a transparent electroconductive material arranged on the transparent substrate; an absorber made up of one or more photoactive thin layer(s); a rear electrode formed of a stack of at least: a conductive metal layer; and a native metal oxide layer having a nanometric thickness. The device additionally includes a plurality of transparent zones separating at least two active photovoltaic zones; and a metal reconnection layer having a contact surface S to the rear electrode, wherein the ratio R.sub.a=S/S.sub.5 between the contact surface S of the metal reconnection layer and the surface S.sub.5 of an active photovoltaic zone is such that 0.2%<R.sub.a<2%.
Spectrometer utilizing surface plasmon
Provided are spectrometers utilizing surface plasmons and surface plasmon resonance. The spectrometer includes a substrate including a region having a permittivity slope (varying permittivity), a dielectric spacer configured to correspond to the region having a permittivity slope, and a detector configured to face the region having a permittivity slope with the dielectric spacer therebetween. The region having a permittivity slope includes a region having a dopant concentration slope (varying concentration).
ENERGY-COLLECTING TOUCHSCREEN UNIT
Techniques are disclosed to enable an energy-collecting touchscreen unit having a thin, substantially transparent cover layer through which a viewing area within the touchscreen unit can be observed while protecting the touchscreen unit from physical damage. The touchscreen unit has a common base layer disposed beneath the cover layer, and it has at least one touch sensor and a photovoltaic surface. The touch sensor and the photovoltaic surface are affixed to opposite faces of the common base layer. The touchscreen unit also includes an electrical interconnection with both the photovoltaic surface and the touch sensor.
SiGeSn VIRTUAL SUBSTRATE FORMED BY MOLECULAR BEAM EPITAXY ON A Si SUBSTRATE FOR THE STRAINED GROWTH OF GeSn
A method of growing fully relaxed SiGeSn buffer layers on Si substrates to produce virtual substrates for the epitaxial growth of high quality GeSn films suitable for high performance infrared (IR) optoelectronic device technology directly integrated on silicon. Growing the SiGeSn virtual substrate uses a precisely decreasing growth temperature and Si flux and a precisely increasing Ge and Sn flux. The virtual substrates may have a slightly larger lattice constant than that of the target GeSn alloy to impose a precise degree of tensile strain resulting in a direct band gap for the target GeSn alloy.
Architectures enabling back contact bottom electrodes for semiconductor devices
A semiconductor device and method for fabricating same is disclosed. Embodiments are directed to a semiconductor device and fabrication of same which include a polycrystalline or amorphous substrate. An electrically conductive Ion Beam-Assisted Deposition (IBAD) template layer is positioned above the substrate. At least one electrically conductive hetero-epitaxial buffer layer is positioned above the IBAD template layer. The at least one buffer layer has a resistivity of less than 100 μΩcm. The semiconductor device and method foster the use of bottom electrodes thereby avoiding complex and expensive lithography processes.