H01L31/073

METAL-CARBON-NANOTUBE METAL MATRIX COMPOSITES FOR METAL CONTACTS ON PHOTOVOLTAIC CELLS

A solar cell structure is disclosed that includes a first metal layer, formed over predefined portions of a sun-exposed major surface of a semiconductor structure, that form electrical gridlines of the solar cell; a network of carbon nanotubes formed over the first metal layer; and a second metal layer formed onto the network of carbon nanotubes, wherein the second metal layer infiltrates the network of carbon nanotubes to connect with the first metal layer to form a first metal matrix composite comprising a metal matrix and a carbon nanotube reinforcement, wherein the second metal layer is an electrically conductive layer in which the carbon nanotube reinforcement is embedded in and bonded to the metal matrix, and the first metal matrix composite provides enhanced mechanical support as well as enhanced or equal electrical conductivity for the electrical contacts against applied mechanical stressors to the electrical contacts.

PHOTOVOLTAIC DEVICES AND SEMICONDUCTOR LAYERS WITH GROUP V DOPANTS AND METHODS FOR FORMING THE SAME

According to the embodiments provided herein, a photovoltaic device can include an absorber layer. The absorber layer can be doped p-type with a Group V dopant and can have a carrier concentration of the Group V dopant greater than 4×10.sup.15 cm.sup.−3. The absorber layer can include oxygen in a central region of the absorber layer. The absorber layer can include an alkali metal in the central region of the absorber layer. Methods for carrier activation can include exposing an absorber layer to an annealing compound in a reducing environment. The annealing compound can include cadmium chloride and an alkali metal chloride.

PHOTOVOLTAIC DEVICES AND SEMICONDUCTOR LAYERS WITH GROUP V DOPANTS AND METHODS FOR FORMING THE SAME

According to the embodiments provided herein, a photovoltaic device can include an absorber layer. The absorber layer can be doped p-type with a Group V dopant and can have a carrier concentration of the Group V dopant greater than 4×10.sup.15 cm.sup.−3. The absorber layer can include oxygen in a central region of the absorber layer. The absorber layer can include an alkali metal in the central region of the absorber layer. Methods for carrier activation can include exposing an absorber layer to an annealing compound in a reducing environment. The annealing compound can include cadmium chloride and an alkali metal chloride.

DOPING AND PASSIVATION FOR HIGH EFFICIENCY SOLAR CELLS

The present disclosure relates to thin-film solar cells with improved efficiency and methods for producing thin-film solar cells having increased efficiency. In certain embodiments, thin-film solar cells having an efficiency of over 21%, over 20%, over 19%, over 15%, over 10%, etc. has been obtained using the methods of the disclosure. In certain aspects, the methods of the disclosure use passivation, passivating oxides, and/or doping treatments in increase the efficiency of the thin-film solar cells; e.g., CdTe-based thin-film solar cells.

Photovoltaic device including a back contact and method of manufacturing

A photovoltaic device includes a substrate, a transparent conductive oxide, an n-type window layer, a p-type absorber layer and an electron reflector layer. The electron reflector layer may include zinc telluride doped with copper telluride, zinc telluride alloyed with copper telluride, or a bilayer of multiple layers containing zinc, copper, cadmium and tellurium in various compositions. A process for manufacturing a photovoltaic device includes forming a layer over a substrate by at least one of sputtering, evaporation deposition, CVD, chemical bath deposition process, and vapor transport deposition process. The process includes forming an electron reflector layer over a p-type absorber layer.

Photovoltaic device including a back contact and method of manufacturing

A photovoltaic device includes a substrate, a transparent conductive oxide, an n-type window layer, a p-type absorber layer and an electron reflector layer. The electron reflector layer may include zinc telluride doped with copper telluride, zinc telluride alloyed with copper telluride, or a bilayer of multiple layers containing zinc, copper, cadmium and tellurium in various compositions. A process for manufacturing a photovoltaic device includes forming a layer over a substrate by at least one of sputtering, evaporation deposition, CVD, chemical bath deposition process, and vapor transport deposition process. The process includes forming an electron reflector layer over a p-type absorber layer.

SOLAR CELL MODULE
20170358693 · 2017-12-14 ·

A solar cell module includes a plurality of compound semiconductor solar cells each including a compound semiconductor substrate, a first electrode part on a front surface of the compound semiconductor substrate, an insulating substrate positioned at a back surface of the compound semiconductor substrate, a second electrode part positioned between the back surface of the compound semiconductor substrate and a front surface of the insulating substrate, and an insulating adhesive attaching the insulating substrate to the second electrode part; a conductive connection member electrically connecting two adjacent compound semiconductor solar cells to each other; a conductive adhesive attaching the conductive connection member to a corresponding electrode part of the compound semiconductor solar cell; a front substrate positioned on the compound semiconductor solar cells; and a back substrate positioned below the compound semiconductor solar cells.

Photovoltaic Devices Including an Interfacial Layer

A photovoltaic cell can include an interfacial layer in contact with a semiconductor layer.

Photovoltaic Devices Including an Interfacial Layer

A photovoltaic cell can include an interfacial layer in contact with a semiconductor layer.

MBE growth technique for group II-VI inverted multijunction solar cells

A method of forming a Group II-VI multijunction semiconductor device comprises providing a Group IV substrate, forming a first subcell from a first Group II-VI semiconductor material, forming a second subcell from a second Group II-VI semiconductor material, and removing the substrate. The first subcell is formed over the substrate and has a first bandgap, while the second subcell is formed over the first subcell and has a second bandgap which is smaller than the first bandgap. Additional subcells may be formed over the second subcell with the bandgap of each subcell smaller than that of the preceding subcell and with each subcell preferably separated from the preceding subcell by a tunnel junction. Prior to the removal of the substrate, a support layer is affixed to the last-formed subcell in opposition to the substrate.