Photovoltaic devices such as solar cells having one or more field-effect hole or electron inversion/accumulation layers as contact regions are configured such that the electric field required for charge inversion and/or accumulation is provided by the output voltage of the photovoltaic device or that of an integrated solar cell unit. In some embodiments, a power source may be connected between a gate electrode and a contact region on the opposite side of photovoltaic device. In other embodiments, the photovoltaic device or integrated unit is self-powering.

Photovoltaic devices such as solar cells having one or more field-effect hole or electron inversion/accumulation layers as contact regions are configured such that the electric field required for charge inversion and/or accumulation is provided by the output voltage of the photovoltaic device or that of an integrated solar cell unit. In some embodiments, a power source may be connected between a gate electrode and a contact region on the opposite side of photovoltaic device. In other embodiments, the photovoltaic device or integrated unit is self-powering.

A quantum efficiency test controller (QETC) and related techniques for measuring quantum efficiency are described. The QETC performs one or more test iterations to obtain test results regarding quantum efficiency of a multijunction photovoltaic device (MPD) having a number N of photovoltaic junctions (N>0), where the QETC is associated with N bias light sources. During a test iteration, the QETC activates a grating monochromator to emit a first test probe of monochromatic light at a first wavelength; and while the grating monochromator is emitting the first test probe, iterates through and activates each of the N bias light sources to emit a corresponding bias band of wavelengths of light. After performing the test iteration(s), the QETC generates an output that is based on the test results related to the quantum efficiency of the MPD.

Methods of fabricating a graphene film are disclosed. An example method can include providing a substrate, heating the substrate between about 600? C. and about 1100? C. in a chamber, and introducing a carbon source into the chamber at a temperature between about 600? C. and about 1100? C. for about 10 seconds to about 1 minute. The method can further include cooling the substrate to about room temperature to form the graphene film Methods of fabricating pillared graphene nano structures and graphene based devices are also provided.

Methods of fabricating a graphene film are disclosed. An example method can include providing a substrate, heating the substrate between about 600? C. and about 1100? C. in a chamber, and introducing a carbon source into the chamber at a temperature between about 600? C. and about 1100? C. for about 10 seconds to about 1 minute. The method can further include cooling the substrate to about room temperature to form the graphene film Methods of fabricating pillared graphene nano structures and graphene based devices are also provided.

A photovoltaic device that includes an upper cell that absorbs a first range of wavelengths of light and a bottom cell that absorbs a second range of wavelengths of light. The bottom cell includes a heterojunction comprising a crystalline germanium containing (Ge) layer. At least one surface of the crystalline germanium (Ge) containing layer is in contact with a silicon (Si) containing layer having a larger band gap than the crystalline (Ge) containing layer.

A photovoltaic device that includes an upper cell that absorbs a first range of wavelengths of light and a bottom cell that absorbs a second range of wavelengths of light. The bottom cell includes a heterojunction comprising a crystalline germanium containing (Ge) layer. At least one surface of the crystalline germanium (Ge) containing layer is in contact with a silicon (Si) containing layer having a larger band gap than the crystalline (Ge) containing layer.

Manufacture of multi-junction solar cells, and devices thereof, are disclosed. The architectures are also adapted to provide for a more uniform and consistent fabrication of the solar cell structures, leading to improved yields, greater efficiency, and lower costs. Certain solar cells may be from a different manufacturing process and further include one or more compositional gradients of one or more semiconductor elements in one or more semiconductor layers, resulting in a more optimal solar cell device. A multi-junction cell may include a back surface field layer, a tunneling junction layer, a first active cell, and a second active cell.

Manufacture of multi-junction solar cells, and devices thereof, are disclosed. The architectures are also adapted to provide for a more uniform and consistent fabrication of the solar cell structures, leading to improved yields, greater efficiency, and lower costs. Certain solar cells may be from a different manufacturing process and further include one or more compositional gradients of one or more semiconductor elements in one or more semiconductor layers, resulting in a more optimal solar cell device. A multi-junction cell may include a back surface field layer, a tunneling junction layer, a first active cell, and a second active cell.

The invention relates to a photoreceptor device, with a first crystalline, semi-conductive material, comprising a first lattice parameter, and a second crystalline, semi-conductive material, deposited on the first material and comprising a second lattice parameter, different from the first lattice parameter. In particular, the device comprises an interface layer between the first and second materials, made from an amorphous material and structured to comprise regularly spaced apart openings in the plane of the layer. The second material comprises protuberances coming out of the openings of the interface layer and forming separated crystal grains, each grain comprising a plurality of facets forming at least one angle relative to one another.