A method for manufacturing a stacked thin film, includes forming a photoelectric conversion layer on a first transparent electrode by sputtering using a target mainly composed of copper in an oxygen containing atmosphere. An oxygen partial pressure of the sputtering is in a range of 0.01 [Pa] or more and 4.8 [Pa] or less, and 0.24d [Pa] or more and 2.4d [Pa] or less when a deposition rate is d [m/min], in formation of the photoelectric conversion layer. A sputtering temperature is 300 C. or more and 600 C. or less, in formation of the photoelectric conversion layer.

According to one embodiment, a photochemical reaction system comprises a CO.sub.2 production unit, a CO.sub.2 absorption unit, and a CO.sub.2 reduction unit. The CO.sub.2 reduction unit comprises a laminated body and an ion transfer pathway. The laminated body comprises an oxidation catalyst layer producing O.sub.2 and H.sup.+ by oxidizing H.sub.2O, a reduction catalyst layer producing carbon compounds by reducing CO.sub.2 absorbed by the CO.sub.2 absorption unit, and a semiconductor layer formed between the oxidation catalyst layer and the reduction catalyst layer and develops charge separation with light energy. The ion transfer pathways make ions move between the oxidation catalyst layer side and the reduction catalyst layer side.

According to one embodiment, a photochemical reaction system comprises a CO.sub.2 production unit, a CO.sub.2 absorption unit, and a CO.sub.2 reduction unit. The CO.sub.2 reduction unit comprises a laminated body and an ion transfer pathway. The laminated body comprises an oxidation catalyst layer producing O.sub.2 and H.sup.+ by oxidizing H.sub.2O, a reduction catalyst layer producing carbon compounds by reducing CO.sub.2 absorbed by the CO.sub.2 absorption unit, and a semiconductor layer formed between the oxidation catalyst layer and the reduction catalyst layer and develops charge separation with light energy. The ion transfer pathways make ions move between the oxidation catalyst layer side and the reduction catalyst layer side.

This invention includes multiple quantum well and quantum dot channel FETs, which can process multi-state/multi-bit logic, and multibit-bit inverters configured as static random-access memories (SRAMs). SRAMs can be implemented as flip-flops and registers. In addition, multiple quantum well and quantum dot channel structures are configured to function as multi-bit high-speed quantum dot (QD) random access memories (NVRAMs). Multi-bit Logic, SRAMs and QD-NVRAMs are spatially located on a chip, depending on the application, to provide a low-power consumption and high-speed hardware platform. The multi-bit logic, SRAM and register, and QD-NVRAM are implemented on a single chip in a CMOS-like platform for applications including artificial intelligence (AI) and machine learning.

A voltage matched multijunction solar cell having first and second solar cell stacks that are electrically connected parallel to each other. The first solar cell stack is optimized for absorption of incoming solar light in a first wavelength range and the second solar cell stack is optimized for absorption of incoming solar light in a second wavelength range, wherein the first and the second wavelength range do not or at most only partially overlap each other.

A voltage matched multijunction solar cell having first and second solar cell stacks that are electrically connected parallel to each other. The first solar cell stack is optimized for absorption of incoming solar light in a first wavelength range and the second solar cell stack is optimized for absorption of incoming solar light in a second wavelength range, wherein the first and the second wavelength range do not or at most only partially overlap each other.

A photovoltaic device that includes an upper cell that absorbs a first range of wavelengths of light and a bottom cell that absorbs a second range of wavelengths of light. The bottom cell includes a heterojunction comprising a crystalline germanium containing (Ge) layer. At least one surface of the crystalline germanium (Ge) containing layer is in contact with a silicon (Si) containing layer having a larger band gap than the crystalline (Ge) containing layer.

A photovoltaic device that includes an upper cell that absorbs a first range of wavelengths of light and a bottom cell that absorbs a second range of wavelengths of light. The bottom cell includes a heterojunction comprising a crystalline germanium containing (Ge) layer. At least one surface of the crystalline germanium (Ge) containing layer is in contact with a silicon (Si) containing layer having a larger band gap than the crystalline (Ge) containing layer.

A solar cell comprising a bulk germanium silicon growth substrate; a diffused photoactive junction in the germanium silicon substrate; and a sequence of subcells grown over the substrate, with the first grown subcell either being lattice matched or lattice mis-matched to the growth substrate.

A quantum efficiency test controller (QETC) and related techniques for measuring quantum efficiency are described. The QETC performs one or more test iterations to obtain test results regarding quantum efficiency of a multijunction photovoltaic device (MPD) having a number N of photovoltaic junctions (N>0), where the QETC is associated with N bias light sources. During a test iteration, the QETC activates a grating monochromator to emit a first test probe of monochromatic light at a first wavelength; and while the grating monochromator is emitting the first test probe, iterates through and activates each of the N bias light sources to emit a corresponding bias band of wavelengths of light. After performing the test iteration(s), the QETC generates an output that is based on the test results related to the quantum efficiency of the MPD.