Patent classifications
H01L33/305
Light emitting device
The present disclosure provides a light-emitting device, comprising: a light-emitting stack; a first semiconductor layer on the light-emitting stack; a first electrode formed on the first semiconductor layer and comprising an inner segment, an outer segment, and a plurality of extending segments electrically connecting the inner segment with the outer segment.
Light-emitting diode
A light-emitting diode having a stack-like structure, whereby the stack-like structure comprises a substrate layer and a mirror layer and an n-doped bottom cladding layer and an active layer, producing electromagnetic radiation, and a p-doped top cladding layer and an n-doped current spreading layer, and the aforementioned layers are arranged in the indicated sequence. The active layer comprises a quantum well structure. A tunnel diode is situated between the top cladding layer and the current spreading layer, whereby the current spreading layer is formed predominantly of an n-doped Ga-containing layer, having a Ga content >1%.
Light emitting device, light emitting device package, and light unit
Disclosed are a light emitting device, a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer comprising a barrier layer which is disposed between the first conductive semiconductor layer and the second conductive semiconductor layer, and which has an un-doped area and a doped area with dopants.
III-V SEMICONDUCTOR DIODE
A stacked III-V semiconductor diode having an n.sup.+-layer with a dopant concentration of at least 10.sup.19 N/cm.sup.3, an n.sup.-layer with a dopant concentration of 10.sup.12-10.sup.16 N/cm.sup.3, a layer thickness of 10-300 microns, a p.sup.+-layer with a dopant concentration of 510.sup.18-510.sup.20 cm.sup.3, with a layer thickness greater than 2 microns, wherein said layers follow one another in the sequence mentioned, each comprising a GaAs compound. The n.sup.+-layer or the p.sup.+-layer is formed as the substrate and a lower side of the n.sup.-layer is materially bonded with an upper side of the n.sup.+-layer, and a doped intermediate layer is arranged between the n-layer and the p+-layer and materially bonded with an upper side and a lower side.
LIGHT EMITTING MODULE AND LIGHT EMITTING SYSTEM INCLUDING THE SAME
A light emitting system is disclosed. The light emitting system includes: a means whose location can change; and multiple light emitting modules disposed in each section of the means, wherein one or more of the multiple light emitting modules is selectively turned on by a user for purpose to be recognized from outside.
Micro light emitting diode chip
A micro light emitting diode chip including a first-type semiconductor layer, an active layer, a second-type semiconductor layer, a first-type electrode, and a second-type electrode is provided. The first-type semiconductor layer has a first high-concentration doping region and a first low-concentration doping region. The active layer is disposed between the first-type semiconductor layer and the second-type semiconductor layer. The first-type electrode is directly contacted and electrically connected to the first high-concentration doping region. The second-type electrode is electrically connected to the second-type semiconductor layer.
Red LED With Low Forward Voltage, High Wall Plug Efficiency, And High Operating Current Density
Described are light emitting diode (LED) devices including a quantum well comprising an indium gallium nitride (InGaN) well and a barrier layer. The indium gallium nitride (InGaN) well has an indium concentration greater than 18% mole fraction. The LED device has a dominant wavelength greater than 605 nm at a current density of greater than or equal to 2 A/cm.sup.2.
OPTOELECTRONIC SEMICONDUCTOR CHIP AND METHOD FOR PRODUCING SAME
An optoelectronic semiconductor chip (10) is specified, comprising a p-type semiconductor region (4), an n-type semiconductor region (6), and an active layer arranged between the p-type semiconductor region (4) and the n-type semiconductor region (6), said active layer being designed as a multiple quantum well structure (5), wherein the multiple quantum well structure (5) comprises quantum well layers (53) and barrier layers (51), wherein the barrier layers (51) are doped, and wherein undoped intermediate layers (52, 54) are arranged between the quantum well layers (53) and the barrier layers (51). Furthermore, a method for producing the optoelectronic semiconductor chip (10) is specified.
Semiconductor light-emitting device
A semiconductor light-emitting device comprises an epitaxial structure comprising an main light-extraction surface, a lower surface opposite to the main light-extraction surface, a side surface connecting the main light-extraction surface and the lower surface, a first portion and a second portion between the main light-extraction surface and the first portion, wherein a concentration of a doping material in the second portion is higher than that of the doping material in the first portion and, in a cross-sectional view, the second portion comprises a first width near the main light-extraction surface and second width near the lower surface, and the first width is smaller than the second width.
LIGHT EMITTING DIODE WITH DISPLACED P-TYPE DOPING
Light emitting diodes re described. In an embodiment, an LED includes a graded p-side spacer layer on a p-type confinement layer, and the graded p-side spacer layer graded from an initial band gap adjacent the p-type confinement layer to a lower band gap. For example, the graded band gap may be achieved by a graded Aluminum concentration.