An optoelectronic semiconductor device comprises a barrier layer, a first semiconductor layer on the barrier layer, the first semiconductor layer comprising a first dopant and a second dopant, and a second semiconductor layer beneath the barrier layer, the second semiconductor comprising the second dopant, wherein, in the first semiconductor layer, a concentration of the first dopant is larger than a concentration of the second dopant, and the concentration of the second dopant in the second semiconductor layer is larger than that in the first semiconductor layer.

The purpose of the present invention is to provide a technique of manufacturing a nitride semiconductor layer with which, when producing a semiconductor device by forming a nitride semiconductor layer on off-angle inclined substrate, it is possible to stably supply high-quality semiconductor devices by preventing occurrence of a macro step using a material that is not likely to occur lattice strains or crystal defects by mixing with GaN and does not require continuous addition; and provided is a nitride semiconductor device which comprises a nitride semiconductor layer formed on a substrate, wherein the substrate is inclined at an off angle, a rare earth element-added nitride layer to which a rare earth element is added is formed on the substrate as a primed layer, and a nitride semiconductor layer is formed on the rare earth element-added nitride layer.

A semiconductor device includes: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region between the first semiconductor structure and the second semiconductor structure, wherein the active region includes multiple alternating well layers and barrier layers, wherein each of the barrier layers has a band gap, the active region further includes an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region, wherein the electron blocking region includes a band gap, and the band gap of the electron blocking region is greater than the band gap of one of the barrier layers; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the electron blocking region; a confinement layer between the first aluminum-containing layer and the active region, wherein the confinement layer includes a thickness smaller than the thickness of one of the barrier layers; and a p-type dopant above the bottom surface of the active region and comprising a concentration profile comprising a peak shape having a peak concentration value, wherein the peak concentration value lies in the electron blocking region.

Provided are a deep ultraviolet light emitting element that exhibits both high light output power and an excellent reliability, and a method of manufacturing the same. A deep ultraviolet light emitting element 100 of this disclosure comprises an n-type semiconductor layer 30, a light-emitting layer 40, and a p-type semiconductor layers 60, on a substrate 10, in this order. The light-emitting layer 40 emits deep ultraviolet light. The p-type semiconductor layers 60 comprise a p-type first layer 60A and a p-type contact layer 60B directly on the p-type first layer 60A. The p-type contact layer 60B is made of a non-nitride p-type group III-V or p-type group IV semiconductor material, and functions as a reflective layer to reflect the deep ultraviolet light. The reflectance of light at a wavelength of 280 nm incident on the p-type contact layer 60B from the p-type first layer 60A is 10% or higher.

A multi-junction light-emitting diode (LED) includes a first epitaxial structure, a second epitaxial structure and a tunnel junction structure disposed therebetween. The tunnel junction structure includes a In.sub.zAl.sub.X1Ga.sub.1−X1As highly doped p-type semiconductor layer wherein z ranges from 0 to 0.05, a Al.sub.X2Ga.sub.1−X2As first composition graded layer wherein X2 is greater than 0 and less than X1, a Ga.sub.YIn.sub.1−YP highly doped n-type semiconductor layer and a Al.sub.X3Ga.sub.1−X3As second composition graded layer that are sequentially disposed on the first epitaxial structure in such order. A method for making the abovementioned multi-junction LED is also disclosed.

A semiconductor device is provided, which includes an active structure and a first semiconductor layer. The active structure includes an active region having a topmost surface and a bottommost surface, and a first dopant distributing from the topmost surface to the bottommost surface. The first semiconductor layer is located under the active structure and includes a second dopant. The active region includes a semiconductor material including As.

A semiconductor device includes: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region between the first semiconductor structure and the second semiconductor structure, wherein the active region comprises a well layer and a barrier layer, wherein the barrier layer has a band gap; a first electron blocking layer between the second semiconductor structure and the active region, wherein the first electron blocking layer comprises a band gap which is greater than the band gap of the barrier layer; a first aluminum-containing layer between the first electron blocking layer and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the first electron blocking layer; a confinement layer between the first aluminum-containing layer and the active region; and a second aluminum-containing layer between the second semiconductor structure and the first electron blocking layer; wherein both the first aluminum-containing layer and the second aluminum-containing layer have bandgaps greater than the band gap of the first electron blocking layer; and wherein a distance between the first aluminum-containing layer and an upper surface of the active region is between 3 nm and 20 nm.

Method for manufacturing semiconductor light-emitting device having a substrate, a metal layer over the substrate, and a semiconductor layer over the metal layer. The semiconductor layer includes a light-emitting layer, and with respect to the light-emitting layer, a first conductivity type layer at a substrate side and a second conductivity type layer opposite the substrate. The second conductivity type layer includes a first layer forming a semiconductor layer surface and a second layer at the substrate side with respect to the first layer. The method includes exposing a second layer surface by selectively removing the first layer, forming an uneven surface portion of the second layer by frost processing the exposed surface, forming an electrode over the first layer, forming a space between an end portion of the first layer and a peripheral edge of the electrode by side-etching the first layer toward a lower side of the electrode using a nitric acid-based dilute solution, and forming another electrode below the substrate.

Disclosed is a small-size vertical-type light emitting diode chip with high luminous in a central region. A PN junction structure is arranged on a light emitting region base of an interface structure, the interface structure is provided with a P-type Ohmic contact area at the light emitting region base, a central area of the PN junction structure is above the P-type Ohmic contact area, an insulating layer is formed on an extending platform adjacent to the light emitting region base and extends to cover an N-type semiconductor of the PN junction structure to form a border covering region surrounding the N-type semiconductor, an N-type Ohmic contact electrode covers the border covering region, and an N-type electrode pad is arranged on the insulating layer and electrically connected with the N-type Ohmic contact electrode via a bridging connected metal layer.

A semiconductor device is provided, which includes an active structure and a first semiconductor layer. The active structure includes an active region having a topmost surface and a bottommost surface, and a first dopant distributing from the topmost surface to the bottommost surface. The first semiconductor layer is located under the active structure and includes a second dopant. The active region includes a semiconductor material including As.