The present disclosure provides a package device and a manufacturing method thereof. The package device includes an electronic device, a conductive pad having a first bottom surface, and a redistribution layer disposed between the conductive pad and the electronic device. The redistribution layer has a second bottom surface, and the conductive pad is electrically connected to the electronic device through the redistribution layer. The first bottom surface is closer to the electronic device than the second bottom in a normal direction of the electronic device.

A temporary substrate, which is detachable at a detachment temperature higher than 1000° C. comprises: a semiconductor working layer extending along a main plane, a carrier substrate, an intermediate layer having a thickness less than 20 nm arranged between the working layer and the carrier substrate, a bonding interface located in or adjacent the intermediate layer, gaseous atomic species distributed according to a concentration profile along the axis normal to the main plane, the atoms remaining trapped in the intermediate layer and/or in an adjacent layer of the carrier substrate with a thickness less than or equal to 10 nm and/or in an adjacent sublayer of the working layer with a thickness less than or equal to 10 nm when the temporary substrate is subjected to a temperature lower than the detachment temperature.

This disclosure is related to integrating pixelated microdevices into a system substrate to develop a functional system such as display, sensors, and other optoelectronic devices. The process may involve having a structure of release layers in the housing and then using different decoupling mechanisms for release. The release layers are not limited to but can be a combination of chemical or optical or mechanical release layers.

A light-emitting device includes a carrier, a light-emitting element and a connection structure. The carrier includes a first electrical conduction portion. The light-emitting element includes a first light-emitting layer capable of emitting first light and a first contact electrode formed under the light-emitting layer. The first contact electrode is corresponded to the first electrical conduction portion. The connection structure includes a first electrical connection portion and a protective portion surrounding the first contact electrode and the first electrical connection portion. The first electrical connection portion includes an upper portion, a lower portion and a neck portion arranged between the upper portion and the lower portion. An edge of the upper portion is protruded beyond the neck portion, and an edge of the lower portion is protruded beyond the upper portion.

An adhesive sheet for temporary fixation which may have excellent heat resistance to exhibit a sufficient adhesive force even though it undergoes a high temperature process during a process of manufacturing a semiconductor device and may also exhibit a sufficient reduction of the adhesive force by photocuring during the step of peeling off, and a method of manufacturing a semiconductor device using the same, are provided.

The present invention relates to a film-shaped firing material (1) which contains: sinterable metal particles (10); a binder component (20) that is a solid at room temperature; and a liquid component (30) that is a liquid at room temperature, the liquid component having a boiling point from 300 to 450° C.

A system includes a vacuum chuck; and a tape. The tape includes a flexible polymer substrate; and an adhesive die catching film disposed on the flexible polymer substrate facing a front surface of the flexible polymer substrate. The tape is held on the vacuum chuck by suction applied to a rear surface of the flexible polymer substrate.

A semiconductor device including a relatively thin interposer excluding a through silicon hole and a manufacturing method thereof are provided. The method includes forming an interposer on a dummy substrate. The forming of the interposer includes, forming a dielectric layer on the dummy substrate, forming a pattern and a via on the dielectric layer, and forming a seed layer at the pattern and the via of the dielectric layer and forming a redistribution layer and a conductive via on the seed layer. A semiconductor die is connected with the conductive via facing an upper portion of the interposer, and the semiconductor die is encapsulated with an encapsulant. The dummy substrate is removed from the interposer. A bump is connected with the conductive via facing a lower portion of the interposer.

A method for fabricating light emitting diode (LED) dice includes the steps of: providing a substrate [30], and forming a plurality of die sized semiconductor structures [32] on the substrate [30]. The method also includes the steps of providing a receiving plate [42] having an elastomeric polymer layer [44], placing the substrate [30] and the receiving plate [42] in close proximity with a gap [101] therebetween, and performing a laser lift-off (LLO) process by directing a uniform laser beam through the substrate [30] to the semiconductor layer [50] at an interface with the substrate [30] to lift off the semiconductor structures [32] through the gap [101] onto the elastomeric polymer layer [44]. During the laser lift-off (LLO) process the elastomeric polymer layer [44] functions as a shock absorber to reduce momentum transfer, and as an adhesive surface to hold the semiconductor structures [32] in place on the receiving plate [42].

A laminated device wafer forming method includes a laminating step of laminating a first device wafer and a second device wafer to each other, the laminating step including a position adjusting step of imaging, by an imaging unit, a first predetermined line formed on a peripheral portion on the front surface side of the first device wafer and located outside rectangular regions corresponding to devices and a second predetermined line formed on a peripheral portion on the front surface side of the second device wafer and located outside the rectangular regions corresponding to the devices, and adjusting relative positions of the first device wafer and the second device wafer by using the first predetermined line and the second predetermined line.