In described examples, a hermetic package of a microelectromechanical system (MEMS) structure includes a substrate having a surface with a MEMS structure of a first height. The substrate is hermetically sealed to a cap forming a cavity over the MEMS structure. The cap is attached to the substrate surface by a vertical stack of metal layers adhering to the substrate surface and to the cap. The stack has a continuous outline surrounding the MEMS structure while spaced from the MEMS structure by a distance. The stack has: a first bottom metal seed film adhering to the substrate and a second bottom metal seed film adhering to the first bottom metal seed film; and a first top metal seed film adhering to the cap and a second top metal seed film adhering to the first top metal seed film.

In described examples, a hermetic package of a microelectromechanical system (MEMS) structure includes a substrate having a surface with a MEMS structure of a first height. The substrate is hermetically sealed to a cap forming a cavity over the MEMS structure. The cap is attached to the substrate surface by a vertical stack of metal layers adhering to the substrate surface and to the cap. The stack has a continuous outline surrounding the MEMS structure while spaced from the MEMS structure by a distance. The stack has: a first bottom metal seed film adhering to the substrate and a second bottom metal seed film adhering to the first bottom metal seed film; and a first top metal seed film adhering to the cap and a second top metal seed film adhering to the first top metal seed film.

A semiconductor device and method of manufacturing is provided, whereby a support structure is utilized to provide additional support for a conductive element in order to eliminate or reduce the formation of a defective surface such that the conductive element may be formed to have a thinner structure without suffering deleterious structures.

An integrated component having a metallic interlocking structure; the integrated component comprising an integrated circuit integrated in a substrate having a top surface; the integrated circuit comprising a first conducting line; and a first metallic interlocking structure comprising a first array of free-standing metallic columns formed on said top surface and electrically connected to said first conducting line.

An integrated component having a metallic interlocking structure; the integrated component comprising an integrated circuit integrated in a substrate having a top surface; the integrated circuit comprising a first conducting line; and a first metallic interlocking structure comprising a first array of free-standing metallic columns formed on said top surface and electrically connected to said first conducting line.

A display device includes a substrate including a conductive pad, a driving chip facing the substrate and including a conductive bump electrically connected to the conductive pad and an inspection bump which is insulated from the conductive pad, and an adhesive member which is between the conductive pad and the driving chip and connects the conductive pad to the driving chip. The adhesive member includes a first adhesive layer including a conductive ball, and a second adhesive layer facing the first adhesive layer, the second adhesive layer including a first area including a color-changing material, and a second area adjacent to the first area and excluding the color-changing material.

A display device includes a substrate including a conductive pad, a driving chip facing the substrate and including a conductive bump electrically connected to the conductive pad and an inspection bump which is insulated from the conductive pad, and an adhesive member which is between the conductive pad and the driving chip and connects the conductive pad to the driving chip. The adhesive member includes a first adhesive layer including a conductive ball, and a second adhesive layer facing the first adhesive layer, the second adhesive layer including a first area including a color-changing material, and a second area adjacent to the first area and excluding the color-changing material.

A semiconductor device and method of manufacturing is provided, whereby a support structure is utilized to provide additional support for a conductive element in order to eliminate or reduce the formation of a defective surface such that the conductive element may be formed to have a thinner structure without suffering deleterious structures.

In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a contact layer over a first major surface of a substrate. The substrate includes device regions separated by kerf regions. The contact layer is disposed in the kerf region and the device regions. A structured solder layer is formed over the device regions. The contact layer is exposed at the kerf region after forming the structured solder layer. The contact layer and the substrate in the kerf regions are diced.

A conductive connecting member formed on a bonded face of an electrode terminal of a semiconductor or an electrode terminal of a circuit board, the conductive connecting member comprising a porous body formed in such manner that a conductive paste containing metal fine particles (P) having mean primary particle diameter from 10 to 500 nm and an organic solvent (S), or a conductive paste containing the metal fine particles (P) and an organic dispersion medium (D) comprising the organic solvent (S) and an organic binder (R) is heating-treated so as for the metal fine particles (P) to be bonded, the porous body being formed by bonded metal fine particles (P) having mean primary particle diameter from 10 to 500 nm, a porosity thereof being from 5 to 35 volume %, and mean pore diameter being from 1 to 200 nm.