Patent classifications
H01L2224/275
SEMICONDUCTOR PACKAGE AND METHOD OF FORMING SAME
In an embodiment, a method includes attaching a first package component to a first carrier, the first package component comprising: an aluminum pad disposed adjacent to a substrate; a sacrificial pad disposed adjacent to the substrate, the sacrificial pad comprising a major surface opposite the substrate, a protrusion of the sacrificial pad extending from the major surface; and a dielectric bond layer disposed around the aluminum pad and the sacrificial pad; attaching a second carrier to the first package component and the first carrier, the first package component being interposed between the first carrier and the second carrier; removing the first carrier; planarizing the dielectric bond layer to comprise a top surface being coplanar with the protrusion; and etching a portion of the protrusion.
Method for permanently bonding wafers by a connecting layer by means of solid state diffusion or phase transformation
A method for bonding of a first solid substrate to a second solid substrate which contains a first material with the following steps, especially the following sequence: formation or application of a function layer which contains a second material to the second solid substrate, making contact of the first solid substrate with the second solid substrate on the function layer, pressing together the solid substrates for forming a permanent bond between the first and second solid substrate, at least partially reinforced by solid diffusion and/or phase transformation of the first material with the second material, an increase of volume on the function layer being caused.
THROUGH-SUBSTRATE-VIAS WITH SELF-ALIGNED SOLDER BUMPS
A semiconductor structure and methods of forming the semiconductor structure include a solder bump self-aligned to a through-substrate-via, wherein the solder bump and the through-substrate-via are formed of a conductive metal material, and wherein the through-substrate-via is coupled to a buried metallization layer, which is formed of a different conductive metal material.
THROUGH-SUBSTRATE-VIAS WITH SELF-ALIGNED SOLDER BUMPS
A semiconductor structure and methods of forming the semiconductor structure include a solder bump self-aligned to a through-substrate-via, wherein the solder bump and the through-substrate-via are formed of a conductive metal material, and wherein the through-substrate-via is coupled to a buried metallization layer, which is formed of a different conductive metal material.
Nitride-enriched oxide-to-oxide 3D wafer bonding
A semiconductor structure comprising a first semiconductor structure; a second semiconductor structure; and a silicon-nitride layer configured to bond the first semiconductor structure and second semiconductor structure together. The first semiconductor structure comprises a first wafer; a first dielectric layer; a first interconnect structure; and a first oxide layer. The second semiconductor structure comprises a second wafer; a second dielectric layer; a second interconnect structure; and a second oxide layer. The structure further comprises a first nitride layer residing on a top surface of the first oxide layer formed by a nitridation process of the top surface of the first oxide layer; and a second nitride layer residing on a top surface of the second oxide layer formed by the nitridation process of the top surface of the second oxide layer. Further, the silicon-nitride layer comprises the first nitride layer and the second nitride layer.
Method for performing direct bonding between two structures
This method includes steps a) providing the first structure and second structure, the first structure including a surface on which a silicon layer is formed; b) bombarding the silicon layer by a beam (F) of species configured to reach the surface of the first structure, and to preserve a part of the silicon layer with a surface roughness of less than 1 nm RMS on completion of the bombardment; c) bonding the first structure and second structure by direct bonding between the part of the silicon layer preserved in step b) and the second structure, steps b) and c) being executed in the same chamber subjected to a vacuum of less than 10.sup.?2 mbar.
METHOD FOR PERFORMING DIRECT BONDING BETWEEN TWO STRUCTURES
This method includes steps a) providing the first structure and second structure, the first structure including a surface on which a silicon layer is formed; b) bombarding the silicon layer by a beam (F) of species configured to reach the surface of the first structure, and to preserve a part of the silicon layer with a surface roughness of less than 1 nm RMS on completion of the bombardment; c) bonding the first structure and second structure by direct bonding between the part of the silicon layer preserved in step b) and the second structure, steps b) and c) being executed in the same chamber subjected to a vacuum of less than 10.sup.2 mbar.
NITRIDE-ENRICHED OXIDE-TO-OXIDE 3D WAFER BONDING
A semiconductor structure comprising a first semiconductor structure; a second semiconductor structure; and a silicon-nitride layer configured to bond the first semiconductor structure and second semiconductor structure together. The first semiconductor structure comprises a first wafer; a first dielectric layer; a first interconnect structure; and a first oxide layer. The second semiconductor structure comprises a second wafer; a second dielectric layer; a second interconnect structure; and a second oxide layer. The structure further comprises a first nitride layer residing on a top surface of the first oxide layer formed by a nitridation process of the top surface of the first oxide layer; and a second nitride layer residing on a top surface of the second oxide layer formed by the nitridation process of the top surface of the second oxide layer. Further, the silicon-nitride layer comprises the first nitride layer and the second nitride layer.
Semiconductor package and method of forming same
In an embodiment, a method includes attaching a first package component to a first carrier, the first package component comprising: an aluminum pad disposed adjacent to a substrate; a sacrificial pad disposed adjacent to the substrate, the sacrificial pad comprising a major surface opposite the substrate, a protrusion of the sacrificial pad extending from the major surface; and a dielectric bond layer disposed around the aluminum pad and the sacrificial pad; attaching a second carrier to the first package component and the first carrier, the first package component being interposed between the first carrier and the second carrier; removing the first carrier; planarizing the dielectric bond layer to comprise a top surface being coplanar with the protrusion; and etching a portion of the protrusion.
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
A semiconductor device includes a first integrated circuit, a second integrated circuit and a bonding layer. The bonding layer is disposed between the first integrated circuit and the second integrated circuit, wherein the bonding layer includes a first layer and a second layer, the first layer is an aluminum nitride (AlN) layer, and the second layer is one of an aluminum oxide (AlO) layer and an aluminum oxynitride (AlON) layer.