Patent classifications
H01L2224/276
Wafer level flat no-lead semiconductor packages and methods of manufacture
Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.
Wafer level flat no-lead semiconductor packages and methods of manufacture
Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.
Wafer level flat no-lead semiconductor packages and methods of manufacture
Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.
Wafer level flat no-lead semiconductor packages and methods of manufacture
Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.
MODULE STRUCTURES WITH COMPONENT ON SUBSTRATE POST
A module structure comprises a patterned substrate having a substrate surface and comprising a substrate post protruding from the substrate surface. A component is disposed on the substrate post. The component has a component top side and a component bottom side opposite the component top side. The component bottom side is disposed on the substrate post. The component extends over at least one edge of the substrate post. One or more component electrodes are disposed on the component.
MODULE STRUCTURES WITH COMPONENT ON SUBSTRATE POST
A module structure comprises a patterned substrate having a substrate surface and comprising a substrate post protruding from the substrate surface. A component is disposed on the substrate post. The component has a component top side and a component bottom side opposite the component top side. The component bottom side is disposed on the substrate post. The component extends over at least one edge of the substrate post. One or more component electrodes are disposed on the component.
CAVITY STRUCTURES
A cavity structure comprises a cavity substrate comprising a substrate surface, one or more cavity walls extending from the substrate surface, a cap disposed on the one or more cavity walls, and at least a portion of a module tether physically attached to the cavity substrate. The cavity substrate, the cap, and the one or more cavity walls form a cavity enclosing a volume, for example enclosing a vacuum, air, an added gas, or a liquid. The cavity structure can be a micro-transfer printable structure provided on a cavity structure source wafer. A plurality of cavity structures can be disposed on a destination substrate, for example by transfer printing, dry contact printing, or micro-transfer printing.
CAVITY STRUCTURES
A cavity structure comprises a cavity substrate comprising a substrate surface, one or more cavity walls extending from the substrate surface, a cap disposed on the one or more cavity walls, and at least a portion of a module tether physically attached to the cavity substrate. The cavity substrate, the cap, and the one or more cavity walls form a cavity enclosing a volume, for example enclosing a vacuum, air, an added gas, or a liquid. The cavity structure can be a micro-transfer printable structure provided on a cavity structure source wafer. A plurality of cavity structures can be disposed on a destination substrate, for example by transfer printing, dry contact printing, or micro-transfer printing.
SURFACE ACOUSTIC WAVE FILTER PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME
A surface acoustic wave (SAW) filter package structure includes a dielectric substrate having a dielectric layer, a first patterned conductive layer, a second patterned conductive layer, and a conductive connection layer. The conductive connection layer is electrically connected between the first patterned conductive layer and the second patterned conductive layer, which are disposed at opposite sides of the dielectric layer. The second patterned conductive layer has a finger electrode portion. An active surface of a chip is faced toward the finger electrode portion. A polymer sealing frame is disposed between the chip and the dielectric substrate and surrounds the periphery of the chip to form a chamber together with the chip and the dielectric substrate. The mold sealing layer is disposed on the dielectric substrate and covers the chip and the polymer sealing frame. A manufacturing method of the SAW filter package structure is also disclosed.
SURFACE ACOUSTIC WAVE FILTER PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME
A surface acoustic wave (SAW) filter package structure includes a dielectric substrate having a dielectric layer, a first patterned conductive layer, a second patterned conductive layer, and a conductive connection layer. The conductive connection layer is electrically connected between the first patterned conductive layer and the second patterned conductive layer, which are disposed at opposite sides of the dielectric layer. The second patterned conductive layer has a finger electrode portion. An active surface of a chip is faced toward the finger electrode portion. A polymer sealing frame is disposed between the chip and the dielectric substrate and surrounds the periphery of the chip to form a chamber together with the chip and the dielectric substrate. The mold sealing layer is disposed on the dielectric substrate and covers the chip and the polymer sealing frame. A manufacturing method of the SAW filter package structure is also disclosed.