A power semiconductor device includes a casing, a first insulating circuit board, a second insulating circuit board, and a sealing material. The first insulating circuit board is disposed to be surrounded by the casing. The second insulating circuit board is surrounded by the casing and spaced from the first insulating circuit board so as to sandwich a semiconductor element between the first insulating circuit board and the second insulating circuit board. The sealing material fills a region surrounded by the casing. The first or second insulating circuit board is provided with a hole extending from one main surface to the other main surface opposite to one main surface. From at least a portion of an inner wall surface of the casing a protrusion extending to a region overlapping the first or second insulating circuit board in a plan view extends toward the region surrounded by the casing.

At the time of clamping, excessive stress is applied to bonding parts between substrates and input/output terminals, which may cause the bonding parts to be detached and cause the substrates to be cracked. A lower electrode of a power semiconductor element 11 is connected via a bonding material 13 to a first interconnection layer 12 arranged on a lower surface of the power semiconductor element 11, and an upper electrode 14 of the power semiconductor element 11 is connected via the bonding material 13 to a second interconnection layer 15 arranged on an upper surface. Also, a second main terminal 16 electrically connected to the upper electrode 14 of the power semiconductor element 11 is connected via the bonding material 13 to the second interconnection layer 15 and contacts and is positioned on a third interconnection layer 24 (spacer) arranged to be parallel to the first interconnection layer 12 on the lower surface. An insulating layer 26 is laminated on a surface of each of the first interconnection layer 12 to the third interconnection layer 24 opposite the bonding material 13, and a heat dissipating layer 27 is laminated on the insulating layer 26.

A semiconductor module includes a die pad frame; a semiconductor chip disposed in a chip region an an upper surface of the die pad frame, the semiconductor chip having an upper surface on which a first electrode is disposed and a lower surface on which a second electrode is disposed; a conductive connection member for die pad disposed between the second electrode of the semiconductor chip and the upper surface of the die pad frame, the conductive connection member for die pad electrically connecting the second electrode of the semiconductor chip and the upper surface of the die pad frame; and a sealing resin for sealing the semiconductor chip, the die pad frame, and the conductive connection member for die pad.

A semiconductor device includes a semiconductor chip having an electrode portion and a joining member electrically connected to the electrode portion to allow an electric current to flow in the semiconductor chip through the joining member. The joining member contains a protective material that has a positive temperature coefficient of resistivity, and the positive temperature coefficient of resistivity has a larger value in a temperature range higher than a threshold temperature than in a temperature range lower than the threshold temperature, the threshold temperature being a predetermined temperature lower than a breakdown temperature of the semiconductor chip. The electrode portion of the semiconductor chip may contain the protective material.

The present disclosure describes a semiconductor device including: a semiconductor chip having an electrode; a conductive member including a metal base and having a mounting portion and a peripheral portion surrounding the mounting portion; a solder that is provided between the electrode and the mounting portion; and a sealing resin body that integrally seals the semiconductor chip, at least the face opposed to the electrode in the conductive member, and the solder.

A cooler (1) has a cooling plate (1a), a cooling fin (1b) provided on a center portion of a lower surface of the cooling plate (1a), and a lower projection (1c) provided on a peripheral portion of the lower surface of the cooling plate (1a). A semiconductor device (3) is provided on an upper surface of the cooling plate (1a). A bus bar (5) is connected to the semiconductor device (3). A cooling mechanism (8) encloses a lower surface and a lateral surface of the cooler (1). An O-ring (9) is provided between a lower surface of the lower projection (1c) and a bottom surface of the cooling mechanism (8). A bolt (10) penetrates a sidewall of the cooling mechanism (8) and screws the cooler (1) to the cooling mechanism (8).

A semiconductor module includes a die pad frame; a semiconductor chip disposed in a chip region on an upper surface of the die pad frame, the semiconductor chip having an upper surface on which a first electrode is disposed and a lower surface on which a second electrode is disposed; a conductive connection member for die pad disposed between the second electrode of the semiconductor chip and the upper surface of the die pad frame, the conductive connection member for die pad electrically connecting the second electrode of the semiconductor chip and the upper surface of the die pad frame; and a sealing resin for sealing the semiconductor chip, the die pad frame, and the conductive connection member for die pad.

To provide a semiconductor device 100 including a semiconductor element with a less warped chip. A semiconductor device manufacturing method include: bonding a rear surface of a chip having electrodes on both sides thereof to a front surface of a substrate; providing, to the front surface of the substrate to which the chip is bonded, a plating protective film having an opening at a position which is on the front surface of the chip and corresponds to an electrode at which plating is to be formed, after the bonding; plating the electrode of the chip after the providing; and removing the plating protective film from the substrate, after the plating.

The semiconductor device is provided with a plurality of switching elements connected in parallel to each other, and a plurality of recirculation element connected in parallel to the aforementioned plurality of switching elements. An emitter electrode serves as a reference potential of the aforementioned plurality of switching elements and an anode electrode serves as a reference potential of the aforementioned plurality of recirculation elements are electrically connected by the same plate-like member consisting of a conductive material. The aforementioned switching elements and the aforementioned recirculation elements which are connected in parallel on the lowest potential side are constituted so that the distance from the emitter terminal connected to the aforementioned emitter electrode to the aforementioned recirculation element becomes no greater than the distance from the aforementioned emitter terminal.

A semiconductor device includes a first semiconductor module and a second semiconductor module. The first semiconductor module configures an upper arm, and includes first semiconductor elements connected in parallel to each other, a sealing resin body, and a positive electrode terminal. The second semiconductor module configures a lower arm, and includes second semiconductor elements connected in parallel to each other, a sealing resin body, and a negative electrode terminal. The first and second semiconductor modules are aligned in an alignment direction. At least one of the first and second semiconductor modules has a relay terminal for electrically relaying electrodes on a low potential side of the first semiconductor elements and electrodes on a high potential side of the second semiconductor elements.