Patent classifications
H
ELECTRICITY
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H01
ELECTRIC ELEMENTS
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H01L
SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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2224/00
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
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H01L2224/01
Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
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H01L2224/34
Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
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H01L2224/36
Structure, shape, material or disposition of the strap connectors prior to the connecting process
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H01L2224/38
of a plurality of strap connectors
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H01L2224/38

PACKAGE STRUCTURE
20250336795 · 2025-10-30 ·

A package structure includes a substrate, a chip, a first electrically conductive piece and a second electrically conductive piece. The chip is disposed on the substrate. The first electrically conductive piece includes a first electrically conductive portion and at least one first pin. The first pin is connected with the first electrically conductive portion. The first electrically conductive portion is connected with the chip. The first pin is away from the chip. The second electrically conductive piece includes a second electrically conductive portion and at least one second pin. The second pin is connected with the second electrically conductive portion. The second electrically conductive portion is connected with the chip. The second pin is away from the chip. At least one of the first electrically conductive piece and the second electrically conductive piece is an integrally formed structure.