H01L2224/40

STRUCTURES AND METHODS FOR SOURCE-DOWN VERTICAL SEMICONDUCTOR DEVICE

A semiconductor device includes a region of semiconductor material having a first side and a second side opposite to the first side. Active device structures are adjacent to the first side, the active device structures comprising source regions and gate electrodes. A first gate conductor is at the first side electrically connected to the gate electrodes, a drain region is at the second side, a second gate conductor is at the second side, and through-semiconductor vias extending from the first side towards the side and electrically connecting the first gate electrode to the second gate electrode. A source electrode is at the first side electrically connected to the source regions, and a drain electrode is at the second side electrically connected to the drain region. The through-semiconductor vias are electrically isolated from the source regions and the drain region. The structure provides a gate/drain up with a source-down configuration.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

A semiconductor device includes a first insulating resin member sealing a mounting surface of a lead frame, and a second insulating resin member sealing a heat dissipating surface. The second insulating resin member contains a filler having a maximum diameter of 0.02 mm to 0.075 mm. The second insulating resin member includes a thin molded portion formed in contact with the heat dissipating surface of the lead frame. The thin molded portion has a thickness 1.1 times to 2 times the maximum diameter of the filler. The semiconductor device includes, at an interface between the first insulating resin member and the second insulating resin member, a mixture layer in which these resins are mixed with each other.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME

A method for manufacturing a semiconductor device includes: fixing a semiconductor chip to a first part of a leadframe; bonding one connector member to a first terminal of the semiconductor chip, a second terminal of the semiconductor chip, a second part of the leadframe, and a third part of the leadframe; forming a sealing member; and separating a first conductive part of the connector member and a second conductive part of the connector member by removing at least a section of the portion of the connector member exposed outside the sealing member, the first conductive part being bonded to the first terminal and the second part, the second conductive part being bonded to the second terminal and the third part.

METAL TAB FOR CHIP ASSEMBLY
20210272884 · 2021-09-02 · ·

A semiconductor die having a metal tab connected thereto. The metal tab includes at least one slot on at least one side of the metal tab, wherein the at least one slot i) creates an opening between at least two portions of the metal tab and ii) exposes the semiconductor die in relation to the metal tab. The semiconductor die can be a silicon (Si) die and the metal tab can be a copper (Cu) tab, where the at least one slot includes at least four slots corresponding to each of at least four sides of the metal, and wherein with respect to each of the at least four sides, each corresponding slot i) creates an opening between at least two portions of the Cu metal tab and ii) exposes the Si semiconductor die in relation to the Cu metal tab.

Packaging structure for gallium nitride devices

Implementations of semiconductor packages may include: a substrate having one or more traces on a first side and one or more traces on a second side of the substrate. The substrate may be rigid. The packages may include at least one die mechanically and electrically coupled to the first side of the substrate. The die may be a high voltage die. The package may include one or more traces along one or more edges of the substrate. The one or more traces along the one or more edges of the substrate provide electrical connectivity between the one or more traces on the first side of the substrate and the one or more traces on the second side of the substrate. The package may also include a molding compound encapsulating at least the first and the one or more edges of the ceramic substrate.

ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF
20210265546 · 2021-08-26 ·

An electronic device and a manufacturing method thereof are provided. The pattern circuit of each surface mount structure of the electronic device is disposed on the substrate; at least two through holes are respectively corresponding to at least two signal lines of the pattern circuit; and the two ends of at least one optoelectronic element are respectively electrically connected to at least two signal lines of the pattern circuit. Each connection pad group of the driving circuit board is corresponding to each surface mount structure, and at least two connection pads are respectively corresponding to the at least two through holes of the surface mount structure. At least two conductive members of each conductive member unit are disposed in the at least two through holes of the surface mount structure, respectively, and extending to the first surface and the second surface of the substrate. The conductive member disposed in each through hole electrically connects the signal lines of each surface mounting structure to the connection pads of each connection pad group of the driving circuit board.

SEMICONDUCTOR DEVICE
20210193592 · 2021-06-24 ·

A semiconductor device includes an insulating support member, a first and a second conductive layer, a first semiconductor element, a first lead, a first detection conductor and a first gate conductor. The first and second conductive layers are disposed on a front surface of the insulating support member. The first semiconductor includes a first and a second electrode on the same side, and a third electrode disposed on the other side and electrically connected to the first conductive layer. The first lead is connected to the first and second conductive layer. The first detection conductor is connected to the first electrode. The first gate conductor is connected to the second electrode. At least one of the first detection conductor and the first gate conductor has an end connected to the first semiconductor element. The end has a coefficient of linear expansion smaller than that of the first conductive layer.

Method for Fabricating a Semiconductor Device by Using Different Connection Methods for the Semiconductor Die and the Clip

A semiconductor device includes a carrier, a first external contact, a second external contact, and a semiconductor die. The semiconductor die has a first main face, a second main face opposite to the first main face, a first contact pad disposed on the first main face, a second contact pad disposed on the second main face, a third contact pad disposed on the second main face, and a vertical transistor. The semiconductor die is disposed with the first main face on the carrier. A clip connects the second contact pad to the second external contact. A first bond wire is connected between the third contact pad and the first external contact. The first bond wire is disposed at least partially under the clip.

Semiconductor package having exposed heat sink for high thermal conductivity
11127663 · 2021-09-21 · ·

Provided is a semiconductor package having an exposed heat sink for high thermal conductivity. The semiconductor package includes at least one semiconductor chip 110, the lead frame 120, a signal line 130, the sealing member 140, and at least one heat sink 150, wherein the lead frame 120 has a first surface, to which the semiconductor chips 110 are attached, and a second surface facing the first surface, the signal line 130 electrically connects the semiconductor chips 110 and the semiconductor chip 110 to the lead frame 120 by wire bonding or clip bonding, the sealing member 140 surrounds areas where the semiconductor chips 110 are attached, except for an external connection terminal 121 of the lead frame 120, and exposes the second surface of the lead frame 120, and the at least one heat sink 150 are attached to the second surface of the exposed lead frame 120. Here, spaces A and B are interposed between the sealing member 140 and the heat sink 150 which face each other, and the heat sink 150 is attached to the second surface of the lead frame 120 after molding of the sealing member 140. Accordingly, the sealing member 140 and the heat sink 150 may be prevented from being warped and thus, stress directly applied to the semiconductor chip 110 is removed. Therefore, reliability and electrical characteristics may be stably secured, and a terminal used in electrical connection may be easily secured through the lead frame 120 exposed to the outside of the sealing member 140.

Cooling apparatus, semiconductor module, and vehicle
11018076 · 2021-05-25 · ·

A semiconductor module is provided, where a coolant circulation portion of a cooling apparatus has a first coolant flow channel and a second coolant flow channel arranged so as to sandwich therebetween a fin region in which a cooling fin is provided, and each having two ends in a longitudinal direction, a casing portion of the cooling apparatus includes a first opening provided on an end side corresponding to a first end of the first coolant flow channel and a second opening provided on an end side corresponding to a second end of the second coolant flow channel, the second end and the first end are arranged on the same side of the casing portion, and the first coolant flow channel and the second coolant flow channel are each at least partly provided below the cooling fin.