In an integrated circuit (IC), a semiconductor substrate has a first side and an opposite second side. The second side has a trench. Circuitry is on the first side. An inductive structure is within the trench. The inductive structure is connected to the circuitry through vias in the semiconductor substrate. The semiconductor substrate is mounted on a package substrate. At least a portion of the inductive structure contacts the package substrate. The circuitry is coupled to the inductive structure through wires to the package substrate.

In described examples, a microelectronic device includes a microelectronic die with a die attach surface. The microelectronic device further includes a nanoparticle layer coupled to the die attach surface. The nanoparticle layer may be in direct contact with the die attach surface, or may be coupled to the die attach surface through an intermediate layer, such as an adhesion layer or a contact metal layer. The nanoparticle layer includes nanoparticles having adjacent nanoparticles adhered to each other. The microelectronic die is attached to a package substrate by a die attach material. The die attach material extends into the nanoparticle layer and contacts at least a portion of the nanoparticles.

A semiconductor chip (6) having flexibility is bonded to a heat radiation material (4) with solder. The semiconductor chip (6) is pressed by a tip of a pressing member (9,11) from an upper side. As a result, convex warpage of the semiconductor chip (6) can be suppressed. Furthermore, since voids can be prevented from remaining in the solder (7), the heat radiation of the semiconductor device can be enhanced.

A stacked assembly of semiconductor devices includes a mounting pad covering a first portion of a low-side semiconductor device, and a contact layer covering a second portion of the low-side semiconductor device. A first mounting clip electrically connected to the contact layer has a supporting portion joining the first mounting clip to a first lead frame portion. A second mounting clip attached to the mounting pad has a supporting portion joining the second mounting clip to a second lead frame portion. A high-side semiconductor device has a first terminal electrically connected to the first mounting clip and thereby to the contact layer, and a second terminal electrically connected to the second mounting clip.

In described examples, a microelectronic device includes a microelectronic die with a die attach surface. The microelectronic device further includes a nanoparticle layer coupled to the die attach surface. The nanoparticle layer may be in direct contact with the die attach surface, or may be coupled to the die attach surface through an intermediate layer, such as an adhesion layer or a contact metal layer. The nanoparticle layer includes nanoparticles having adjacent nanoparticles adhered to each other. The microelectronic die is attached to a package substrate by a die attach material. The die attach material extends into the nanoparticle layer and contacts at least a portion of the nanoparticles.

A driving backplane includes a base, and a pixel driving circuit, a first electrode and a first piezoelectric block that are disposed in the sub-pixel region. The pixel driving circuit is disposed on the base. The first electrode is disposed at a side of the pixel driving circuit away from the base. The first electrode includes a first sub-electrode pattern and a second sub-electrode pattern that are in a same layer and are spaced apart to be insulated from each other, and the first sub-electrode pattern is electrically connected to the pixel driving circuit. The first piezoelectric block is disposed between the pixel driving circuit and the first electrode, and the first sub-electrode pattern and the second sub-electrode pattern are in contact with the first piezoelectric block.

A stacked assembly of semiconductor devices includes a mounting pad covering a first portion of a low-side semiconductor device, and a contact layer covering a second portion of the low-side semiconductor device. A first mounting clip electrically connected to the contact layer has a supporting portion joining the first mounting clip to a first lead frame portion. A second mounting clip attached to the mounting pad has a supporting portion joining the second mounting clip to a second lead frame portion. A high-side semiconductor device has a first terminal electrically connected to the first mounting clip and thereby to the contact layer, and a second terminal electrically connected to the second mounting clip.

A connection terminal unit that can be appropriately connected to terminal connection portions of a semiconductor module including a semiconductor element and that can reduce a projection area when seen in a direction orthogonal to a direction along a chip surface is realized. Connection terminal unit includes plurality of connection terminals facing and connected to plurality of terminal connection portions of semiconductor module, and terminal mold portion holding connection terminals. Terminal mold portion has abutment portion that abuts against semiconductor module or base material holding semiconductor module. Abutment portion has vertical abutment portion that abuts against semiconductor module or base material from vertical direction that is a direction in which connection terminals face terminal connection portions, and side abutment portion that abuts against semiconductor module or base material from at least two directions that are different from each other and intersect with vertical direction.

A package structure for power devices includes a heat dissipation insulating substrate, a plurality of power devices, at least one conductive clip, and a heat dissipation baseplate. The heat dissipation insulating substrate has a first surface and a second surface opposite thereto, and the power devices form a bridge circuit topology and are disposed on the first surface, wherein active regions of at least one of the power devices are flip-chip bonded to the first surface. The conductive clip is configured to electrically connect at least one of the power devices to the first surface, and the heat dissipation baseplate is disposed at the second surface of the heat dissipation insulating substrate.

A package structure for power devices includes a heat dissipation insulating substrate, a plurality of power devices, a heat dissipation baseplate, and a thermal interface layer. The heat dissipation insulating substrate has a first surface and a second surface which are opposite to each other, and the power devices are coupled to the first surface of the heat dissipation insulating substrate. The heat dissipation baseplate is disposed at the second surface of the heat dissipation insulating substrate, wherein at least one of a surface of the heat dissipation baseplate and the second surface of the heat dissipation insulating substrate has at least one plateau, and the plateau is at least disposed within a projected area of the plurality of power devices. The thermal interface layer is disposed between the second surface of the heat dissipation insulating substrate and the surface of the heat dissipation baseplate.