There is disclosed a method for manufacturing a semiconductor device comprising a semiconductor chip having a connection portion and a wiring circuit board having a connection portion, the respective connection portions being electrically connected to each other, or a semiconductor device comprising a plurality of semiconductor chips having connection portions, the respective connection portions being electrically connected to each other. The connection portions consist of metal. The above described method comprises: (a) a first step of press-bonding the semiconductor chip and the wiring circuit board or the semiconductor chips to each other so that the respective connection portions are in contact with each other with a semiconductor adhesive interposed therebetween, at a temperature lower than a melting point of the metal of the connection portion, to obtain a temporarily connected body; (b) a second step of sealing at least a part of the temporarily connected body with a sealing resin to obtain a sealed temporarily connected body; and (c) a third step of heating the sealed temporarily connected body at a temperature equal to or higher than the melting point of the metal of the connection portion, to obtain a sealed connected body.

A method of forming a 3D package. The method may include joining an interposer to a laminate chip carrier with the solid state diffusion of a first plurality of solder bumps by applying a first selective non-uniform heat and first uniform pressure; joining a top chip to the interposer with the solid state diffusion of a second plurality of solder bumps by applying a second selective non-uniform heat and second uniform pressure; heating the 3D package, the first and second pluralities of solder bumps to a temperature greater than the reflow temperature of the first and second pluralities of solder bumps, where the second plurality of solder bumps achieves the reflow temperature before the first plurality of solder bumps, where the first and second selective non-uniform heats being less that the reflow temperature of the first and second pluralities of solder bumps, respectively.

A method of and system for manufacturing an electronic device, a curable conductive adhesive for use in the same, and an electronic device are disclosed. The method includes printing a conductive adhesive onto pads at ends of traces on a substrate, placing one or more components having a non-standard size and/or shape onto the pads with the conductive adhesive thereon, and after the component(s) have been placed onto the pads, curing the conductive adhesive at a predetermined temperature or with light having a predetermined wavelength (band). The system comprises a printer configured to print a conductive adhesive onto pads at ends of traces on a substrate, a surface mounting machine configured to place one or more components having a non-standard size and/or shape onto the pads with the conductive adhesive thereon, and a curing station configured to cure the conductive adhesive after the component(s) have been placed onto the pads.

A compound and method of use thereof consisting of an A-staged thermoplastic-polyimide (TPI) adhesive, a viscous uncured liquid of polyamic-acid polymer (PAA), the TPI precursor, synthesized and dissolved in a polar aprotic organic solvent, and including, as appropriate, combinations of flat particulate inorganic ceramic and/or metallic electrically insulating, and/or electrically conducting, and/or thermally conducting fillers for interface-bonding to create a robust joint between surfaces with conventional lamination processes that utilize relatively moderate temperatures and applied pressures, such particles resulting in the reduction of the occurrence and size of gas voids within the adhesive bondline.

A compound and method of use thereof consisting of an A-staged thermoplastic-polyimide (TPI) adhesive, a viscous uncured liquid of polyamic-acid polymer (PAA), the TPI precursor, synthesized and dissolved in a polar aprotic organic solvent, and including, as appropriate, combinations of particulate ceramic and/or metallic thermally conducting, electrically insulating, and thermally conducting, electrically conducting fillers for interface-bonding to create a robust joint between surfaces with conventional lamination processes that utilize relatively moderate temperatures and applied pressures.

Disclosed is a method for manufacturing a semiconductor device which includes: a semiconductor chip; a substrate and/or another semiconductor chip; and an adhesive layer interposed therebetween. This method comprises the steps of: heating and pressuring a laminate having: the semiconductor chip; the substrate; the another semiconductor chip or a semiconductor wafer; and the adhesive layer by interposing the laminate with pressing members for temporary press-bonding to thereby temporarily press-bond the substrate and the another semiconductor chip or the semiconductor wafer to the semiconductor chip; and heating and pressuring the laminate by interposing the laminate with pressing members for main press-bonding, which are separately prepared from the pressing members for temporary press-bonding, to thereby electrically connect a connection portion of the semiconductor chip and a connection portion of the substrate or the another semiconductor chip.

One aspect relates to a method for manufacturing a substrate assembly for attachment to an electronic component A substrate is provided with a first side and a second side. A contact material layer is applied to the first side of the substrate. A pre-fixing agent is applied at least to sections of a side of
the contact material layer facing away from the substrate.

One aspect relates to a method for manufacturing a substrate assembly for attachment to an electronic component A substrate is provided with a first side and a second side. A contact material layer is applied to the first side of the substrate. A pre-fixing agent is applied at least to sections of a side of
the contact material layer facing away from the substrate.

A method may include forming a first atomic layer deposition (ALD) bonding layer on a surface of a first semiconductor device, and forming a second ALD bonding layer on a surface of a second semiconductor device. The method may include joining the first semiconductor device and the second semiconductor device via the first ALD bonding layer and the second ALD bonding layer. The method may include performing an annealing operation to fuse the first ALD bonding layer and the second ALD bonding layer and form a single ALD bonding layer that bonds the first semiconductor device with the second semiconductor device.

Disclosed herein is a method that includes picking up a plate with a nozzle, the plate including at least one opening to allow air to flow therethrough. The method includes picking up a die with the nozzle such that the plate is located between the nozzle and the die. The method includes placing the die and the plate onto a device, substrate or another die such that the plate is located on top of the die. The method includes heating the device, substrate or another die and the die in a heat chamber while the plate remains on top of the die to permanently attach the die to the device, substrate or another die. Further disclosed herein is an assembly system configured to perform a method that utilizes the plate and die combination for attaching the die to a device, substrate or another die by heating.