H01L2224/80359

Method of fabricating multi-substrate semiconductor devices

A first insulating layer is formed on a substrate. An opening is formed in the first insulating layer. A barrier layer is formed on the first insulating layer and conforming to sidewalls of the first insulating layer in the opening, and a conductive layer is formed on the barrier layer. Chemical mechanical polishing is performed to expose the first insulating layer and leave a barrier layer pattern in the opening and a conductive layer pattern on the barrier layer pattern in the opening, wherein a portion of the conductive layer pattern protrudes above an upper surface of the insulating layer and an upper surface of the barrier layer pattern. A second insulating layer is formed on the first insulating layer, the barrier layer pattern and the conductive layer pattern and planarized to expose the conductive layer pattern. A second substrate may be bonded to the exposed conductive layer pattern.

METHOD FOR WAFER-WAFER BONDING
20180005978 · 2018-01-04 ·

A first semiconductor structure including a first bonding oxide layer having a first metallic bonding structure embedded therein and a second semiconductor structure including a second bonding oxide layer having a second metallic bonding structure embedded therein are provided. A nitride surface treatment process is performed to provide a nitrided surface layer to each structure. Each nitrided surface layer includes nitridized oxide regions located in an upper portion of the bonding oxide layer and nitridized metallic regions located in an upper portion of the metallic bonding structures. The nitrogen within the nitridized metallic regions is then removed to restore the upper portion of the metallic bonding structures to its original composition. Bonding is performed to form a dielectric bonding interface between the nitridized oxide regions present in the first and second structures, and a metallic bonding interface between the first and second metallic bonding structures.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD

A semiconductor device includes a first substrate having an attaching surface on which first electrodes and a first insulating film are exposed, an insulating thin film that covers the attaching surface of the first substrate, and a second substrate which has an attaching surface on which second electrodes and a second insulating film are exposed and is attached to the first substrate in a state in which the attaching surface of the second substrate and the attaching surface of the first substrate are attached together sandwiching the insulating thin film therebetween, and the first electrodes and the second electrodes deform and break a part of the insulating thin film so as to be directly electrically connected to each other.

Bonded semiconductor structure and method for forming the same

A bonded semiconductor structure includes a first substrate and a second substrate. The first substrate includes a first interconnection structure, a first dielectric layer, and a first silicon carbon nitride (SiCN) layer sequentially stacked thereon. And at least a first conductive pad is formed in the first dielectric layer and the first SiCN layer. The second substrate includes a second interconnection structure, a second dielectric layer, and a second SiCN layer sequentially stacked thereon. And at least a second conductive pad is formed in the second dielectric layer and the second SiCN layer. The first conductive pad physically contacts the second conductive pad, and the first SiCN layer physically contacts the second SiCN layer.

Semiconductor device and manufacturing method thereof

A method of manufacturing a semiconductor device includes forming an opening in a first substrate and filling the opening with a metal to form a first connection electrode. The first substrate is then polished by chemical mechanical polishing under conditions such that a polishing rate of the metal is less that of the region surrounding the metal. The chemical mechanical polishing thereby causes the first connection electrode to protrude from the surface of the first substrate. The first substrate is stacked with a second substrate having a second connection electrode. The first and second connection electrodes are bonded by applying pressure and heating to a temperature that is below the melting point of the metal of the first connection electrode.

Electronic apparatus and manufacturing method for an electronic apparatus having multiple substrates directly electrically connected through an insulating film

A semiconductor device includes a first substrate having an attaching surface on which first electrodes and a first insulating film are exposed, an insulating thin film that covers the attaching surface of the first substrate, and a second substrate which has an attaching surface on which second electrodes and a second insulating film are exposed and is attached to the first substrate in a state in which the attaching surface of the second substrate and the attaching surface of the first substrate are attached together sandwiching the insulating thin film therebetween, and the first electrodes and the second electrodes deform and break a part of the insulating thin film so as to be directly electrically connected to each other.

METHOD AND STRUCTURES FOR LOW TEMPERATURE DEVICE BONDING
20250087616 · 2025-03-13 ·

Dies and/or wafers including conductive features at the bonding surfaces are stacked and direct hybrid bonded at a reduced temperature. The surface mobility and diffusion rates of the materials of the conductive features are manipulated by adjusting one or more of the metallographic texture or orientation at the surface of the conductive features and the concentration of impurities within the materials.

DIRECT BOND INTERCONNECT ARCHITECTURES FOR PACKAGING ASSEMBLIES
20250218988 · 2025-07-03 ·

Assemblies and methods of manufacturing assemblies comprising semiconductor chips and package substrates wherein the semiconductor chips are operably coupled to the package substrate through a solderless direct metal-to-metal bond region. The solderless direct metal-to-metal bond region also comprises a dielectric polymer. Package substrates can comprise interconnect bridges and the semiconductor chips can be operably coupled to the interconnect bridges and can also be operably coupled to each other through the interconnect bridges.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
20250266377 · 2025-08-21 ·

A semiconductor device may include a peripheral circuit comprising a plurality of transistors, a cell array and a contact array positioned adjacent to each other over the peripheral circuit, a bonding pad for electrically connecting the peripheral circuit with the cell array and the contact array, the bonding pad comprising first and second portions, wherein the first portion has a first width and is in electrical connection with at least one transistor of the peripheral circuit, wherein the second portion has a second width that is less than the first width of the first portion, and wherein a bonding via electrically connecting the bonding pad with the contact array or the cell array extends partially inside the first portion of the bonding pad.

Aluminum Oxide Crystallization Barrier for Hybrid Bonding

A method for substrate processing for hybrid bonding that includes forming an aluminum oxide crystallization barrier on a metal contact. In some embodiments, the method may include providing a substrate in preparation for a hybrid bonding process where the substrate has an aluminum oxide (Al.sub.2O.sub.3) bonding layer on an uppermost surface of the substrate and a metal contact is present in the aluminum oxide bonding layer. A crystallization barrier is formed on an uppermost surface of the metal contact. The crystallization barrier disrupts crystallization of the aluminum oxide bonding layer caused by interaction of the aluminum oxide material of the aluminum oxide bonding layer and a metal material of the metal contact during a subsequent annealing process of the hybrid bonding process.