According to an embodiment, a temperature of an inside of a furnace is set to fall within a range of a reduction temperature or more of a carboxylic acid and less than a melting temperature of a solder bump, and the inside is concurrently set to have a first carboxylic acid gas concentration. Thereafter, the temperature of the inside is raised up to the melting temperature, and the inside is concurrently set to have a second carboxylic acid gas concentration. The second carboxylic acid gas concentration is lower than the first carboxylic acid gas concentration, and is a concentration containing a minimum amount of carboxylic acid gas defined to achieve reduction on an oxide film of the solder bump. The inside has the second carboxylic acid gas concentration at least at a time when the temperature of the inside reaches the melting temperature.

Various aspects of this disclosure provide a method of manufacturing an electronic device and an electronic device manufactured thereby. As a non-limiting example, various aspects of this disclosure provide a method of manufacturing an electronic device, and an electronic device manufactured thereby, that utilizes ink to form an intermetallic bond between respective conductive interconnection structures of a semiconductor die and a substrate.

A semiconductor device according to the present invention includes: a substrate; a heat generating portion provided on the substrate; a cap substrate provided above the substrate so that a hollow portion is provided between the substrate and the cap substrate; and a reflection film provided above the heat generating portion and reflecting a medium wavelength infrared ray. The reflection film reflects the infrared ray radiated to the cap substrate side through the hollow portion due to the temperature increase of the heat generating portion, so that the temperature increase of the cap substrate side can be suppressed. Because of this function, even if mold resin is provided on the cap substrate, increase of the temperature of the mold resin can be suppressed.

Various aspects of this disclosure provide a method of manufacturing an electronic device and an electronic device manufactured thereby. As a non-limiting example, various aspects of this disclosure provide a method of manufacturing an electronic device, and an electronic device manufactured thereby, that utilizes ink to form an intermetallic bond between respective conductive interconnection structures of a semiconductor die and a substrate.

A die bonding apparatus comprising a first inert gas container having a first inert gas concentration, and a second inert gas container having a second inert gas concentration enclosed within the first inert gas container. The second inert gas concentration is higher than the first inert gas concentration. The die bonding apparatus further comprises a bond head located in the second inert gas container for receiving a die for bonding, and a third inert gas container having an inert gas environment that is separate from the first and second inert gas containers and where a substrate is locatable for die bonding. The bond head is operative to move the die between a first position within the second inert container and a second position within the third inert gas container to bond the die onto the substrate located in the third inert gas container.

A method includes picking up a first package component, removing an oxide layer on an electrical connector of the first package component, placing the first package component on a second package component after the oxide layer is removed, and bonding the first package component to the second package component.

A semiconductor package structure includes a first package including a bonding region and a periphery region surrounding the bonding region, at least one insulating structure disposed in the bonding region of the first package, a second package disposed over the first package and the insulating structure in the bonding region, and a plurality of connectors disposed between the first package and the second package. The plurality of connectors provide electrical connection between the first package and the second package. Further, the insulating structure penetrates the first package and is spaced apart from the plurality of connectors.

A jig for bonding a semiconductor chip may include a pressurizing portion and at least one opening. The pressuring portion may be configured to pressurize an upper surface of the semiconductor chip bonded to a package substrate via a bump and a flux using a laser. The opening may be surrounded by the pressurizing portion. The laser irradiated to the bump and the flux may be transmitted through the opening. A vapor generated from the flux by the laser may be discharged through the opening. Thus, the contamination of the jig caused by the vapor may be prevented so that a transmissivity of the laser through the jig may be maintained.

A display apparatus including a circuit board, at least one LED stack configured to emit light, electrode pads disposed on the at least one LED stack and electrically connected to the at least one LED stack, and electrodes disposed on the electrode pads and electrically connected to the electrode pads, respectively, in which each of the electrodes has a fixed portion that is fixed to one of the electrode pads and an extending portion that is spaced apart from the one of the electrode pads, and the electrodes include at least two metal layers having different thermal expansion coefficients from each other.

A method of manufacturing a semiconductor device includes forming an insulation layer on a support body, selectively forming openings through the insulation layer, forming a conductor pattern in the openings, and above selected portions of, the insulation layer, mounting a first semiconductor element on the insulation layer and electrically connecting the first semiconductor element to the conductor pattern, forming a resin over the first semiconductor element and the insulation layer, removing the support body after the resin is formed to expose a surface of a portion of the conductor pattern, etching the exposed surface of the portion of the conductor pattern to form a recess over the portion of the conductor pattern, and forming a pad containing a metal different than the metal of the conductor pattern in the recess in contact with the conductor pattern.