Patent classifications
H01L2224/81026
Package-on-package (PoP) structure including stud bulbs
Package-On-Package (PoP) structures that includes stud bulbs is provided. According to an embodiment, a POP structure includes a first substrate, stud bulbs, a die, a second substrate, and electrical connectors. The stud bulbs are coupled to a first surface of the first substrate. The die is attached to the first surface of the first substrate. The electrical connectors are coupled to the second substrate, and respective ones of the electrical connectors are coupled to respective ones of the stud bulbs.
Methods for low temperature bonding using nanoparticles
A method of making an assembly can include juxtaposing a top surface of a first electrically conductive element at a first surface of a first substrate with a top surface of a second electrically conductive element at a major surface of a second substrate. One of: the top surface of the first conductive element can be recessed below the first surface, or the top surface of the second conductive element can be recessed below the major surface. Electrically conductive nanoparticles can be disposed between the top surfaces of the first and second conductive elements. The conductive nanoparticles can have long dimensions smaller than 100 nanometers. The method can also include elevating a temperature at least at interfaces of the juxtaposed first and second conductive elements to a joining temperature at which the conductive nanoparticles can cause metallurgical joints to form between the juxtaposed first and second conductive elements.
Chip alignment utilizing superomniphobic surface treatment of silicon die
Certain embodiments of the present disclosure provide a method for soldering a chip onto a surface. The method generally includes forming a bonding pad on the surface on which the chip is to be soldered, wherein the bonding pad is surrounded, at least in part, by dielectric material. The method may also include treating the dielectric material to render the dielectric material superomniphobic, and soldering the chip onto the bonding pad.
Structures for low temperature bonding using nanoparticles
A method of making an assembly can include juxtaposing a top surface of a first electrically conductive element at a first surface of a first substrate with a top surface of a second electrically conductive element at a major surface of a second substrate. One of: the top surface of the first conductive element can be recessed below the first surface, or the top surface of the second conductive element can be recessed below the major surface. Electrically conductive nanoparticles can be disposed between the top surfaces of the first and second conductive elements. The conductive nanoparticles can have long dimensions smaller than 100 nanometers. The method can also include elevating a temperature at least at interfaces of the juxtaposed first and second conductive elements to a joining temperature at which the conductive nanoparticles can cause metallurgical joints to form between the juxtaposed first and second conductive elements.
Package-On-Package (PoP) Structure Including Stud Bulbs
Embodiments concern Package-On-Package (PoP) structures including stud bulbs and methods of forming PoP structures. According to an embodiment, a structure includes a first substrate, stud bulbs, a die, a second substrate, and electrical connectors. The stud bulbs are coupled to a first surface of the first substrate. The die is attached to the first surface of the first substrate. The electrical connectors are coupled to the second substrate, and respective ones of the electrical connectors are coupled to respective ones of the stud bulbs.
CHIP PACKAGES WITH SINTERED INTERCONNECTS FORMED OUT OF PADS
The present invention is directed to a method for interconnecting two components. The first component includes a first substrate and a set of structured metal pads arranged on a main surface. Each of the pads includes one or more channels, extending in-plane with an average plane of the pad, so as to form at least two raised structures. The second interconnect component includes a second substrate and a set of metal pillars arranged on a main surface. The structured metal pads are bonded to a respective, opposite one of the metal pillars, using metal paste. The paste is sintered to form porous metal joints at the level of the channels. Metal interconnects are obtained between the substrates. During the bonding, the metal paste is sintered by exposing the structured metal pads and metal pillars to a reducing agent. The channels and raised structures improve the penetration of the reducing agent.
NON-POROUS COPPER TO COPPER INTERCONNECT
A semiconductor structure which includes a first semiconductor substrate having a first plurality of copper connectors; a second semiconductor substrate having a second plurality of copper connectors; and a joining structure joining the first plurality of copper connectors to the second plurality of copper connectors, the joining structure including a copper intermetallic mesh having pores filled with silver. There is also a method for joining two semiconductor substrates.
Package-on-package (PoP) structure including stud bulbs
Package-On-Package (PoP) structures including stud bulbs and methods of forming PoP structures are provided. A structure may include a first substrate, stud bulbs, a die, a second substrate, and electrical connectors. The stud bulbs are coupled to a first surface of the first substrate. The die is attached to the first surface of the first substrate. The electrical connectors are coupled to the second substrate, and respective ones of the electrical connectors are coupled to respective ones of the stud bulbs.
Method for binding micro device to conductive pad
A method for binding a micro device to a conductive pad of an array substrate is provided. The method includes: forming a liquid layer on the conductive pad of the array substrate; disposing the micro device over the conductive pad such that the micro device is in contact with the liquid layer and is gripped by a capillary force produced by the liquid layer between the micro device and the conductive pad, wherein the micro device comprises an electrode facing the conductive pad; and evaporating the liquid layer such that the electrode is bound to and is in electrical contact with the conductive pad.
STRUCTURES FOR LOW TEMPERATURE BONDING USING NANOPARTICLES
A method of making an assembly can include juxtaposing a top surface of a first electrically conductive element at a first surface of a first substrate with a top surface of a second electrically conductive element at a major surface of a second substrate. One of: the top surface of the first conductive element can be recessed below the first surface, or the top surface of the second conductive element can be recessed below the major surface. Electrically conductive nanoparticles can be disposed between the top surfaces of the first and second conductive elements. The conductive nanoparticles can have long dimensions smaller than 100 nanometers. The method can also include elevating a temperature at least at interfaces of the juxtaposed first and second conductive elements to a joining temperature at which the conductive nanoparticles can cause metallurgical joints to form between the juxtaposed first and second conductive elements.