Provided is a method for manufacturing a semiconductor package, the method including providing a semiconductor chip on a substrate, providing a bonding member between the substrate and the semiconductor chip, and bonding the semiconductor chip on the substrate by irradiating of a laser on the substrate. Here, the bonding member may include a thermosetting resin, a curing agent, and a laser absorbing agent.

According to an embodiment of the present invention, a method of producing a quantum computer chip includes performing a frequency measurement on a qubit chip bonded to a test interposer chip for qubits on the qubit chip at an operating temperature of the qubit chip. The method further includes pulling the qubit chip apart from the test interposer chip after performing the frequency measurement, and modifying a frequency of a subset of qubits after pulling the qubit chip apart from the test interposer chip. The method further includes bonding the qubit chip to a device interposer chip after modifying the frequency of the subset of qubits.

A film element for driving a display device and a display device using the same are disclosed. The film element includes a film substrate including wirings and pads connected to the wirings, and an IC chip mounted on the film substrate to be connected to the wirings. The pads on the film substrate are grouped into a plurality of areas having different thermal correction amounts. Pads in a second area are closer to the IC chip than pads in a first area. A length of the first area is set to a length obtained by subtracting a first thermal correction amount from a first reference length. A length of the second area is set to a length obtained by subtracting a second thermal correction amount from a second reference length. The second thermal correction amount is smaller than the first thermal correction amount or has a negative value.

A photodetector-array and fabrication method thereof are disclosed. The photodetector-array includes a first and second semiconductor structures having respective active regions defining respective pluralities of active photodetectors and active readout integrated circuit pixels (RICPs) electronically connectable to one another respectively. The first and second semiconductor structures are made with different semiconductor materials/compositions having different first and second coefficients of thermal expansion (CTEs) respectively. The pitch distances of the active photodetectors and the pitch distances of the respective active RICPs are configured in accordance with the difference between the first and second CTEs, such that at high temperatures, at which electrical coupling between the first and second semiconductor structures is performed, the electric contacts of the active photodetectors and of their respective RICPs overlap. Accordingly, after the first and second semiconductor structures are bonded together, at least 99.5% of the active photodetector are electrically connected with their respective RICPs.

[Problem] To electrically connect two substrates by using conductive paste while maintaining the distance between the two substrates at a predetermined distance.

[Solution] A substrate module of the present disclosure includes: a first substrate including a plurality of first pads; and a second substrate including a plurality of second pads, the first substrate and the second substrate being electrically connected. A spacer is attached to a pad of at least either of the first pads and the second pads, and one or more pairs of the first pads and the second pads not sandwiching the spacer are bonded with conductive paste in a state where the spacer is sandwiched between another pair of the first pads and the second pads.

The embodiments described provide elongated bonded structures near edges of packaged structures free of solder wetting on sides of copper posts substantially facing the center of the packaged structures. Solder wetting occurs on other sides of copper posts of these bonded structures. The elongated bonded structures are arranged in different arrangements and reduce the chance of shorting between neighboring bonded structures. In addition, the elongated bonded structures improve the reliability performance.

A semiconductor package structure includes a first package, a second package over the first package, a plurality of connectors between the first package and the second package and a plurality of baffle structures between the first package and the second package. The second package includes a bonding region and a periphery region surrounding the bonding region. The connectors are disposed in the bonding region to provide electrical connections between the first package and the second package. The baffle structures are disposed in the periphery region and are separated from each other.

A semiconductor package device is provided that includes a first circuit layer having a first conductive layer and a first stud bump and a second circuit layer having a second conductive layer and a second stud bump. The first stud bump has a first portion and a second portion, and the second portion of the first stud bump is electrically connected to the second conductive layer. The second stud bump has a first portion and a second portion, and the second portion of the second stud bump is electrically connected to the first conductive layer. The first stud bump partially overlaps the second stud bump in a direction substantially perpendicular to the first circuit layer.

A semiconductor package device is provided that includes a first circuit layer having a first conductive layer and a first stud bump and a second circuit layer having a second conductive layer and a second stud bump. The first stud bump has a first portion and a second portion, and the second portion of the first stud bump is electrically connected to the second conductive layer. The second stud bump has a first portion and a second portion, and the second portion of the second stud bump is electrically connected to the first conductive layer. The first stud bump partially overlaps the second stud bump in a direction substantially perpendicular to the first circuit layer.

The embodiments described provide elongated bonded structures near edges of packaged structures free of solder wetting on sides of copper posts substantially facing the center of the packaged structures. Solder wetting occurs on other sides of copper posts of these bonded structures. The elongated bonded structures are arranged in different arrangements and reduce the chance of shorting between neighboring bonded structures. In addition, the elongated bonded structures improve the reliability performance.