A wiring circuit board includes a first insulating layer, a terminal, a second insulating layer disposed at one side in a thickness direction of the terminal, and a wire continuous to the terminal in a direction crossing the thickness direction. The first insulating layer has an opening portion passing through the first insulating layer in the thickness direction and having the opening cross-sectional area increasing as being closer to one side in the thickness direction. The terminal has a peripheral end portion and a solid portion. The peripheral end portion contacts with an inner side surface of the first insulating layer. The inner side surface forms the opening portion. The solid portion integrally disposed with the peripheral end portion at the inner side of the peripheral end portion. The peripheral end portion and the solid portion fill the entire opening portion.

Provided is a semiconductor package including: a first substrate having a first electrode pad and a first protective layer in which a cavity is formed; a first bump pad arranged in the cavity and connected to the first electrode pad; a second substrate facing the first substrate and having a second bump pad; and a bump structure in contact with the first bump pad and the second bump pad, wherein the first electrode pad has a trapezoidal shape, and the first bump pad has a flat upper surface and an inclined side surface extending along a side surface of the first electrode pad.

A semiconductor package includes a first package substrate, a first semiconductor chip on the first package substrate, a plurality of first chip connection units to connect the first package substrate to the first semiconductor chip, an interposer on the first semiconductor chip, the interposer having a width greater than a width of the first semiconductor chip in a direction parallel to an upper surface of the first package substrate, and an upper filling layer including a center portion and an outer portion, the center portion being between the first semiconductor chip and the interposer, and the outer portion surrounding the center portion and having a thickness greater than a thickness of the center portion in a direction perpendicular to the upper surface of the first package substrate.

A wiring substrate includes a resin insulating layer, a via conductor formed in the resin insulating layer such that the via conductor is penetrating through the resin insulating layer, a conductor pad formed on the resin insulating layer and connected to the via conductor, a coating insulating layer formed on the resin insulating layer such that the coating insulating layer is covering the conductor pad, and a metal post formed on the conductor pad and protruding from the coating insulating layer. The via conductor is formed such that the via conductor is increased in diameter toward the conductor pad, and the metal post is formed such that the metal post is increased in diameter toward the conductor pad.

A semiconductor device package includes a semiconductor device, a non-semiconductor substrate over the semiconductor device, and a first connection element extending from the semiconductor device to the non-semiconductor substrate and electrically connecting the semiconductor device to the non-semiconductor substrate.

A printed wiring board includes a resin insulating layer, a metal post formed in the resin insulating layer such that the metal post is protruding from a first surface of the resin insulating layer, a conductor layer formed on a second surface of the resin insulating layer on the opposite side with respect to the first surface of the resin insulating layer, and a via conductor formed in the resin insulating layer such that the via conductor is penetrating through the resin insulating layer and connecting the metal post and the conductor layer. The metal post has a protruding portion protruding from the first surface of the resin insulating layer and an embedded portion integrally formed with the protruding portion and embedded in the resin insulating layer.

In an embodiment a method includes providing a semiconductor chip having a plurality of contact pins, at least one positioning pin and an underside, wherein the contact pins and the positioning pin protrude from the underside, respectively, wherein the contact pins are configured for making electrical contact with the semiconductor chip, wherein the positioning pin narrows in a direction away from the underside, and wherein the positioning pin protrudes further from the underside than the contact pins, providing a connection carrier having a plurality of contact recesses, at least one positioning recess and an upper side, wherein each contact recess is at least partially filled with a solder material, heating the solder material in the contact recesses to a joining temperature at which the solder material at least partially melts and placing the semiconductor chip on the connection carrier, wherein each contact pin is inserted into a contact recess and the positioning pin is inserted into the positioning recess.

Disclosed is an antenna apparatus including a substrate having a cavity in a first outer surface thereof. The substrate has a sidewall defining a portion of the cavity, and a first edge contact is formed at the sidewall. An IC chip is disposed within the cavity and has a side surface facing the sidewall and a second edge contact formed on the side surface electrically connected to the first edge contact. An antenna element, disposed at a second outer surface of the substrate opposite the first outer surface, is electrically connected to RF circuitry within the IC chip through a conductive via extending within the substrate.

A display apparatus is provided. The display apparatus includes a display substrate and a plurality of pads arranged above the display substrate. Each of the plurality of pads includes a first conductive layer, at least a portion of which is covered by an insulating film, a second conductive layer arranged above the first conductive layer, and a clamping portion formed in the second conductive layer.

A strip for an electronic device senses a liquid sample. The strip includes a substrate having a first surface, a plurality of protrusions disposed on the first surface, and each having a width, and a hydrophilic layer having a layer surface disposed on the first surface and the plurality of protrusions, and having a second surface opposite to the layer surface, whereby the liquid sample and the second surface have a contact angle therebetween ranging from 2 to 85 degrees when the liquid sample is disposed on the hydrophilic layer.