Patent classifications
H01L2224/8185
Semiconductor chip suitable for 2.5D and 3D packaging integration and methods of forming the same
The present disclosure relates to a semiconductor chip that includes a substrate, a metal layer, and a number of component portions. Herein, the substrate has a substrate base and a number of protrusions protruding from a bottom surface of the substrate base. The substrate base and the protrusions are formed of a same material. Each of the protrusions has a same height. At least one via hole extends vertically through one protrusion and the substrate base. The metal layer selectively covers exposed surfaces at a backside of the substrate and fully covers inner surfaces of the at least one via hole. The component portions reside over a top surface of the substrate base, such that a certain one of the component portions is electrically coupled to a portion of the metal layer at the top of the at least one via hole.
Heat-dissipating resin composition, cured product thereof, and method of using same
To provide a heat-dissipating resin composition, and cured product thereof, which can effectively transmit heat generated from a heat-generating part such as a semiconductor element or the like with a high heating value to an object such as a substrate, heat sink, shield can lid, housing, or the like, and reduce defects such as contact failure of a relay or connector, or the like. A heat-dissipating resin composition of an embodiment of the present disclosure includes: component (A): epoxy resin; component (B): curing agent for epoxy resin; component (C): (meth)acrylic oligomer with weight average molecular weight of 10,000 or less; and component (D): heat conductive particles.
Fabrication method of semiconductor package with stacked semiconductor chips
A semiconductor package includes a build-up structure; a semiconductor disposed on the build-up structure in a flip-chip manner and having a plurality of bumps penetrating therethrough; an electronic element disposed on the semiconductor chip; and an encapsulant formed on the build-up structure and encapsulating the semiconductor chip and the electronic element, thereby improving the product yield and the overall heat dissipating efficiency.
LIGHT-EMITTING STRUCTURE ALIGNMENT PRESERVATION IN DISPLAY FABRICATION
Techniques are disclosed for forming a frame on the backplane comprising structures at least partially circumscribing or enclosing metal contacts on the backplane. In some embodiments, the frame may comprise a photoresist. The dimensions and structural integrity of the frame can help prevent misalignment and/or damage of physical obtrusions of light-emitting structures during a bonding process of the light-emitting structures to the backplane.
Solderless interconnect for semiconductor device assembly
Semiconductor device assemblies with solderless interconnects, and associated systems and methods are disclosed. In one embodiment, a semiconductor device assembly includes a first conductive pillar extending from a semiconductor die and a second conductive pillar extending from a substrate. The first conductive pillar may be connected to the second conductive pillar via an intermediary conductive structure formed between the first and second conductive pillars using an electroless plating solution injected therebetween. The first and second conductive pillars and the intermediary conductive structure may include copper as a common primary component, exclusive of an intermetallic compound (IMC) of a soldering process. A first sidewall surface of the first conductive pillar may be misaligned with respect to a corresponding second sidewall surface of the second conductive pillar. Such interconnects formed without IMC may improve electrical and metallurgical characteristics of the interconnects for the semiconductor device assemblies.
Circuit module
Breakage of a board due to local concentration of stress at the time when a circuit module deforms is reduced. A circuit module includes a base, a lower layer, and a surface layer. The base has a mounting region in which an electronic component is mounted. The lower layer is made of a resin material. The lower layer is formed over from the mounting region to a region other than the mounting region on the base. The surface layer is made of a resin material different in hardness from the resin material of the lower layer. A periphery of the surface layer is located outside the mounting region and inside a region in which the lower layer is formed.
Circuit module
Breakage of a board due to local concentration of stress at the time when a circuit module deforms is reduced. A circuit module includes a base, a lower layer, and a surface layer. The base has a mounting region in which an electronic component is mounted. The lower layer is made of a resin material. The lower layer is formed over from the mounting region to a region other than the mounting region on the base. The surface layer is made of a resin material different in hardness from the resin material of the lower layer. A periphery of the surface layer is located outside the mounting region and inside a region in which the lower layer is formed.
SEMICONDUCTOR DEVICE PACKAGE INCLUDING THERMAL DISSIPATION ELEMENT AND METHOD OF MANUFACTURING THE SAME
The present disclosure provides a semiconductor device package. The semiconductor device package includes a first die, a second die, and a thermal dissipation element. The first die has a first surface. The second die is disposed on the first surface. The thermal dissipation element is disposed on the first surface. The thermal dissipation element includes a first portion extending in a first direction substantially parallel to the first surface and partially covered by the second die and a second portion extending in a second direction substantially perpendicular to the first surface to be adjacent to an edge of the second die.
SEMICONDUCTOR DEVICE PACKAGE INCLUDING THERMAL DISSIPATION ELEMENT AND METHOD OF MANUFACTURING THE SAME
The present disclosure provides a semiconductor device package. The semiconductor device package includes a first die, a second die, and a thermal dissipation element. The first die has a first surface. The second die is disposed on the first surface. The thermal dissipation element is disposed on the first surface. The thermal dissipation element includes a first portion extending in a first direction substantially parallel to the first surface and partially covered by the second die and a second portion extending in a second direction substantially perpendicular to the first surface to be adjacent to an edge of the second die.
Semiconductor device package including thermal dissipation element and method of manufacturing the same
The present disclosure provides a semiconductor device package. The semiconductor device package includes a first die, a second die, and a thermal dissipation element. The first die has a first surface. The second die is disposed on the first surface. The thermal dissipation element is disposed on the first surface. The thermal dissipation element includes a first portion extending in a first direction substantially parallel to the first surface and partially covered by the second die and a second portion extending in a second direction substantially perpendicular to the first surface to be adjacent to an edge of the second die.