A method for bonding of a first, at least partially metallic contact surface of a first substrate to a second, at least partially metallic contact surface of a second substrate, with the following steps, especially the following progression: application of a sacrificial layer which is at least partially, especially predominantly soluble in the material of at least one of the contact surfaces to at least one of the contact surfaces, bonding of the contact surfaces with at least partial solution of the sacrificial layer in at least one of the contact surfaces.

A bonding apparatus bonds a first substrate having a first alignment mark and a second substrate having a second alignment mark. A first radiation unit radiates white light to an imaging area of a first imaging unit when the second alignment mark is imaged by the first imaging unit. A second radiation unit radiates white light to an imaging area of a second imaging unit when the first alignment mark is imaged by the second imaging unit. A controller detects positions of the first alignment mark and the second alignment mark by processing images obtained by the first imaging unit and the second imaging unit, corrects the detected position of the first alignment mark based on a relationship between a wavelength and an intensity of reflection light reflected from the first substrate, and controls a moving unit based on the corrected position of the first alignment mark.

A semiconductor device comprising a first semiconductor component and a composite bonding layer on the first semiconductor component. The composite bonding layer comprises a dielectric stress buffer layer and a dielectric planarization layer, wherein a hardness of the dielectric stress buffer layer is greater than a hardness of the dielectric planarization layer. The semiconductor device further includes a second semiconductor component bonded to the first semiconductor component by insulator-to-insulator bonding between the composite bonding layer and an insulating bonding layer on the second semiconductor component, wherein the dielectric planarization layer is disposed an interface between the composite bonding layer and the insulating bonding layer.