Patent classifications
H01L2224/83048
Bonding process with inhibited oxide formation
First and second contacts are formed on first and second wafers from disparate first and second conductive materials, at least one of which is subject to surface oxidation when exposed to air. A layer of oxide-inhibiting material is disposed over a bonding surface of the first contact and the first and second wafers are positioned relative to one another such that a bonding surface of the second contact is in physical contact with the layer of oxide-inhibiting material. Thereafter, the first and second contacts and the layer of oxide-inhibiting material are heated to a temperature that renders the first and second contacts and the layer of oxide-inhibiting material to liquid phases such that at least the first and second contacts alloy into a eutectic bond.
Circuits Including Micropatterns and Using Partial Curing to Adhere Dies
A method comprises: providing a layer of curable adhesive material (4) on a substrate (2); forming a pattern of microstructures (321) on the layer of curable adhesive material (4); curing a first region (42) of the layer of curable adhesive material (4) at a first level and a second region (44) of the layer of curable adhesive material (4) at a second level greater than the first level; providing a solid circuit die (6) to directly attach to a major surface of the first region (42) of the layer of curable adhesive material (4); and further curing the first region (42) of the layer of curable adhesive material (4) to anchor the solid circuit die (6) on the first region (42) by forming an adhesive bond therebetween. The pattern of microstructures (321) may include one or more microchannels (321), the method further comprising forming one or more electrically conductive traces in the microchannels (321), in particular, by flow of a conductive particle containing liquid (8) by a capillary force and, optionally, under pressure. The at least one microchannel (321) may extend from the second region (44) to the first region (42) and have a portion beneath the solid circuit die (6). The solid circuit die (6) may have at least one edge disposed within a periphery of the first region (42) with a gap therebetween. The solid circuit die (6) may have at least one contact pad (72) on a bottom surface thereof, wherein the at least one contact pad (72) may be in direct contact with at least one of the electrically conductive traces in the microchannels (321). Forming the pattern of microstructures (321) may comprise contacting a major surface of a stamp (3) to the layer of curable adhesive material (4), the major surface having a pattern of raised features (32) thereon. The curable adhesive material (4) may be cured by an actinic light source such as an ultraviolet (UV) light source (7, 7′), wherein a mask may be provided to at least partially block the first region (42) of the layer of curable adhesive material (4) from the cure. The stamp (3) may be positioned in contact with the curable adhesive material (4) to replicate the pattern of raised features (32) to form the microstructures (321) while the curable adhesive material (4) is selectively cured by the actinic light source such as the ultraviolet (UV) light source (7). The first region (42) of the layer of curab
METHOD FOR THE MANUFACTURE OF INTEGRATED DEVICES INCLUDING A DIE FIXED TO A LEADFRAME
A method for soldering a die obtained using the semiconductor technique with a leadframe, comprising the steps of providing a leadframe, which has at least one surface made at least partially of copper; providing a die, which has at least one surface coated with a metal layer; applying to the surface a solder alloy comprising at least 40 wt % of tin or at least 50% of indium or at least 50% of gallium, without lead, and heating the alloy to a temperature of at least 380° C. to form a drop of solder alloy; providing a die, which has at least one surface coated with a metal layer; and setting the metal layer in contact with the drop of solder alloy to form the soldered connection with the leadframe. Moreover, a device obtained with said method is provided.
Method for the manufacture of integrated devices including a die fixed to a leadframe
A method for soldering a die obtained using the semiconductor technique with a leadframe, comprising the steps of providing a leadframe, which has at least one surface made at least partially of copper; providing a die, which has at least one surface coated with a metal layer; applying to the surface a solder alloy comprising at least 40 wt % of tin or at least 50% of indium or at least 50% of gallium, without lead, and heating the alloy to a temperature of at least 380° C. to form a drop of solder alloy; providing a die, which has at least one surface coated with a metal layer; and setting the metal layer in contact with the drop of solder alloy to form the soldered connection with the leadframe. Moreover, a device obtained with said method is provided.
Jointing material, fabrication method for semiconductor device using the jointing material, and semiconductor device
A jointing material includes: at least one type of element at 0.1 wt % to 30 wt %, the element being capable of forming a compound with each of tin and carbon; and tin at 70 wt % to 99.9 wt % as a main component.
SYSTEM AND APPARATUS FOR SEQUENTIAL TRANSIENT LIQUID PHASE BONDING
Embodiments of the present disclosure include method for sequentially mounting multiple semiconductor devices onto a substrate having a composite metal structure on both the semiconductor devices and the substrate for improved process tolerance and reduced device distances without thermal interference. The mounting process causes “selective” intermixing between the metal layers on the devices and the substrate and increases the melting point of the resulting alloy materials.
LOW WARPAGE CURING METHODOLOGY BY INDUCING CURVATURE
Embodiments of methods and apparatus for reducing warpage of a substrate are provided herein. In some embodiments, a method for reducing warpage of a substrate includes: applying an epoxy mold over a plurality of dies on the substrate in a dispenser tool; placing the substrate on a pedestal in a curing chamber, wherein the substrate has an expected post-cure deflection in a first direction; inducing a curvature on the substrate in a direction opposite the first direction; and curing the substrate by heating the substrate in the curing chamber.
Process and device for low-temperature pressure sintering
Process for producing an electronic subassembly by low-temperature pressure sintering, comprising the following steps: arranging an electronic component on a circuit carrier having a conductor track, connecting the electronic component to the circuit carrier by the low-temperature pressure sintering of a joining material which connects the electronic component to the circuit carrier, characterized in that, to avoid the oxidation of the electronic component or of the conductor track, the low-temperature pressure sintering is carried out in a low-oxygen atmosphere having a relative oxygen content of 0.005 to 0.3%.
MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE
A semiconductor device manufacturing method, including: a first treatment process for reducing an amount of oxygen and carbon adsorbed to a main surface of the conductive plate to 20 atomic % or less; a first checking process for checking whether the conductive plate has a temperature no higher than a reference temperature; a chip placement process for placing, responsive to the conductive plate having the temperature no higher than the reference temperature, a semiconductor chip on the main surface of the conductive plate via a sinter material; a first bonding process for applying heat and pressure to the sinter material according to a first condition that allows the organic substance to partially remain; a preparatory process for making preparations for further bonding the semiconductor chip; and a second bonding process for further applying heat and pressure to the sinter material according to a second condition that sinters the sinter material.
DIE BONDING APPARATUS AND DIE BONDING METHOD
A die bonding apparatus includes: a mounting base including a mounting area on which a first member is mounted; a heater arranged below the mounting base; a side wall configured to surround the mounting area; a collet configured to hold a second member by vacuum-chucking at an end portion; a lid including a hole, the lid being mounted on the side wall; a moving structure configured to move the collet to transport the second member held by the collet through the hole for bonding the second member to the first member; and a gas-supplying tube arranged on the side wall and configured to supply a heating gas to a heating space formed by the side wall and the lid. The lid contains a material capable of: reflecting an infrared radiation caused by the heater and the heating gas; or absorbing and re-radiating the infrared radiation.