The invention concerns a support intended for the implementation of a method of self-assembly of at least one element on a surface of the support, including at least one assembly pad on said surface, a liquid drop having a static angle of contact on the assembly pad smaller than or equal to 15, and nanometer- or micrometer-range pillars on said surface around the pad, the liquid drop having a static angle of contact on the pillars greater than or equal to 150.

A first alignment resin (4) is formed in an annular shape on an electrode (3) of an insulating substrate (1). First plate solder (5) having a thickness thinner than that of the first alignment resin (4) is arranged on the electrode (3) on an inner side of the annular shape of the first alignment resin (4). A semiconductor chip (6) is arranged on the first plate solder (5). The first plate solder (5) is made to melt to bond a lower surface of the semiconductor chip (6) to the electrode (3).

Disclosed is an organic light emitting display device including a dam structure disposed in a non-display area of a substrate and an alignment mark disposed outside the dam structure. The alignment mark is not covered by, and does not overlap with, the dam structure, because the alignment mark is disposed outside the dame structure. Thus, a scribing process may be performed smoothly.

An apparatus is provided which comprises: a substrate, a die site on the substrate to couple with a die, a die side component site on the substrate to couple with a die side component, and a raised barrier on the substrate between the die and die side component sites to contain underfill material disposed at the die site, wherein the raised barrier comprises electroplated metal. Other embodiments are also disclosed and claimed.

Disclosed is an organic light emitting display device including a dam structure disposed in a non-display area of a substrate and an alignment mark disposed outside the dam structure. The alignment mark is not covered by, and does not overlap with, the dam structure, because the alignment mark is disposed outside the dame structure. Thus, a scribing process may be performed smoothly.

A method for forming an electrical device includes attaching a semiconductor die on a carrier. The method further includes dispensing a fillet material at at least one edge of the semiconductor die arranged on the carrier. The method further includes dispensing an underfill material into a gap between the semiconductor die and the carrier after dispensing the fillet material.

In a non-leaded type semiconductor device, a tab, tab suspension leads, and other leads are exposed to one surface of a seal member. A semiconductor element is positioned within the seal member and fixed to a surface of the tab with an adhesive. The tab is formed larger than the semiconductor element so that outer peripheral edges of the tab are positioned outside outer peripheral edges of the semiconductor element. A groove is formed in the tab surface portion positioned between the area to which the semiconductor element is fixed and wire connection areas to which the wires are connected, the groove being formed so as to surround the semiconductor element fixing area, thereby preventing peeling-off between the tab to which the semiconductor element is fixed and the resin which constitutes the package.

A wafer level package includes: a substrate having a circuit pattern unit, a pad spaced apart from the circuit pattern unit, a bonding pad disposed on a side of the pad, and a first protection dam; and a printed circuit board having a connection pad and a second protection dam, where the substrate and the printed circuit board are attached through the bonding and connection pads and the first and second protection dams.

A method of manufacturing a wafer level package includes: forming a circuit pattern unit on a substrate; disposing a pad spaced apart from the circuit pattern unit; forming a secondary film on a side of the pad; forming a protection film, excluding some of the pads where the secondary film is formed; disposing a bonding pad and a protection dam on a side of the pad; attaching the manufactured substrate and printed circuit board to each other.

A wafer level package includes a substrate including bonding pads and a first protection dam and having a plurality of circuit pattern units disposed on a side; a printed circuit board having a plurality of connection pads, a second protection dam and via holes disposed thereon; and a connection unit connected to some of the plurality of connection pads and the second protection dam disposed on the printed circuit board. Freedom of design can be improved through the wafer level package and the manufacturing method thereof, and reliability of the wafer level package can be improved. The manufacturing process can be simplified as the bridge process is omitted when wiring is designed, and the size of an element may be reduced.

An apparatus comprising a first substrate, a dam structure disposed on a first side of the first substrate, and an integrated circuit (IC) memory chip coupled to the first side of the first substrate by a plurality of first conductive members. A second substrate is coupled to a second side of the first substrate by a plurality of second conductive members. A lid coupled to the second substrate encloses the IC memory chip and the first substrate. A thermal interface material (TIM) is coupled between the lid and the dam structure.