A semiconductor device assembly that includes a substrate having a first side and a second side, the first side having at least one dummy pad and at least one electrical pad. The semiconductor device assembly includes a first semiconductor device having a first side and a second side and at least one electrical pillar extending from the second side. The electrical pillar is connected to the electrical pad via solder to form an electrical interconnect. The semiconductor device assembly includes at least one dummy pillar extending from the second side of the first semiconductor device and a liquid positioned between an end of the dummy pillar and the dummy pad. The surface tension of the liquid pulls the dummy pillar towards the dummy pad. The surface tension may reduce or minimize a warpage of the semiconductor device assembly and/or align the dummy pillar and the dummy pad.

Disclosed are an underfill method and apparatus for a semiconductor package, the underfill method includes loading a substrate; charging a filler to be filled in between the substrate and a device; applying the filler to the substrate; and subjecting the applied filler to an electric field.

First and second contacts are formed on first and second wafers from disparate first and second conductive materials, at least one of which is subject to surface oxidation when exposed to air. A layer of oxide-inhibiting material is disposed over a bonding surface of the first contact and the first and second wafers are positioned relative to one another such that a bonding surface of the second contact is in physical contact with the layer of oxide-inhibiting material. Thereafter, the first and second contacts and the layer of oxide-inhibiting material are heated to a temperature that renders the first and second contacts and the layer of oxide-inhibiting material to liquid phases such that at least the first and second contacts alloy into a eutectic bond.

A method of selectively transferring micro devices from a donor substrate to contact pads on a receiver substrate. Micro devices being attached to a donor substrate with a donor force. The donor substrate and receiver substrate are aligned and brought together so that selected micro devices meet corresponding contact pads. A receiver force is generated to hold selected micro devices to the contact pads on the receiver substrate. The donor force is weakened and the substrates are moved apart leaving selected micro devices on the receiver substrate. Several methods of generating the receiver force are disclosed, including adhesive, mechanical and electrostatic techniques.

A method for bonding chips to a landing wafer is disclosed. In one aspect, a volume of alignment liquid is dispensed on a wettable surface of the chip so as to become attached to the surface, after which the chip is moved towards the bonding site on the wafer, the bonding site equally being provided with a wettable surface. A liquid bridge is formed between the chip and the bonding site on the substrate wafer, enabling self-alignment of the chip. Dispensing alignment liquid on the chip and not the wafer is advantageous in terms of mitigating unwanted evaporation of the liquid prior to bonding.

A method of liquid assisted binding is provided. The method includes: forming a conductive pad on the substrate; placing a micro device on the conductive pad, such that the micro device is in contact with the conductive pad in which the micro device comprises an electrode facing the conductive pad; forming a liquid layer on the micro device and the substrate after said placing, such that a part of the liquid layer penetrates between the micro device and the conductive pad, and the micro device is gripped by a capillary force produced by said part of the liquid layer; and evaporating the liquid layer such that the electrode is bound to the conductive pad and is in electrical connection with the conductive pad.

A method of restricting a micro device on a conductive pad is provided. The method includes: forming the conductive pad having a first lateral length on a substrate; forming a liquid layer on the conductive pad; and placing the micro device having a second lateral length over the conductive pad such that the micro device is in contact with the liquid layer and is gripped by a capillary force produced by the liquid layer between the micro device and the conductive pad, the micro device comprising an electrode facing the conductive pad, wherein the first lateral length is less than or equal to twice of the second lateral length.

A semiconductor device includes a semiconductor substrate, a power transistor formed in the semiconductor substrate, the power transistor including an active area in which one or more power transistor cells are formed, a first metal pad formed above the semiconductor substrate and covering substantially all of the active area of the power transistor, the first metal pad being electrically connected to a source or emitter region in the active area of the power transistor, the first metal pad including an interior region laterally surrounded by a peripheral region, the peripheral region being thicker than the interior region, and a first interconnect plate or a semiconductor die attached to the interior region of the first metal pad by a die attach material. Corresponding methods of manufacture are also described.

A die structure includes a first die having a first surface and a second surface opposite the first surface. The first die includes sidewalls extending between the first and second surfaces. The die structure includes conductive ink printed traces including a first group of the conductive ink printed traces on the first surface of the first semiconductor die. A second group of the conductive ink printed traces are on the second surface of the semiconductor die, and a third group of the conductive ink printed traces are on the sidewalls of the semiconductor die.

An electrical joint structure including a substrate, a multi-layer bonding structure, and a blocking layer is provided. The multi-layer bonding structure is present on the substrate and includes a diffusive metal layer and a tin-rich layer. The diffusive metal layer includes a copper-tin alloy on a surface of the diffusive metal layer. The surface faces the substrate. A thickness of the copper-tin alloy is less than or equal to 2 m. The tin-rich layer is present on and in contact with the diffusive metal layer. The blocking layer is present between the multi-layer bonding structure and the substrate and at least in contact with a part of said copper-tin alloy, such that the multi-layer bonding structure is spaced apart from the substrate.