An object of the present disclosure is to provide a method of manufacturing a semiconductor device capable of suppressing an electrostatic breakdown in a configuration including a semiconductor element with a sense cell part. A method of manufacturing a semiconductor device according to the present disclosure includes: bonding each of semiconductor elements 1 and a relay substrate on a conductor plate; connecting each of signal pads of each of the semiconductor elements and each of control pads of the relay substrate by a wire; bonding a first electrode material on each of the semiconductor elements; bonding a second electrode material on the relay substrate; sealing the conductor plate, each of the semiconductor elements, the relay substrate, the first electrode material, and the second electrode material by a sealing resin; and grinding the sealing resin and removing the shorting part to expose part of the second electrode material.

A semiconductor chip including a main electrode and a control electrode is bonded to a substrate. A wiring chip including a first electrode, a second electrode and a wiring is bonded to the substrate. A main electrode member is bonded to the main electrode. A control electrode member is bonded to the second electrode. The control electrode is bonded to the first electrode with a connection member. The semiconductor chip, the substrate, the wiring chip, the main electrode member, the control electrode member and the connection member are putted into a mold and are sealed with sealing material by injecting the sealing material into the mold in a state that distal end surfaces of the main electrode member and the control electrode member are pressed against a buffer material provided between the main electrode member/the control electrode member and the mold. The sealing material is not ground.

A semiconductor chip including a main electrode and a control electrode is bonded to a substrate. A wiring chip including a first electrode, a second electrode and a wiring is bonded to the substrate. A main electrode member is bonded to the main electrode. A control electrode member is bonded to the second electrode. The control electrode is bonded to the first electrode with a connection member. The semiconductor chip, the substrate, the wiring chip, the main electrode member, the control electrode member and the connection member are putted into a mold and are sealed with sealing material by injecting the sealing material into the mold in a state that distal end surfaces of the main electrode member and the control electrode member are pressed against a buffer material provided between the main electrode member/the control electrode member and the mold. The sealing material is not ground.

A display device includes: a substrate; a pixel connected to a gate line and a data line on the substrate; a connection unit connected to one of the gate line and the data line of the substrate; and a driving integrated circuit mounted on the connection unit. The connection unit includes an output lead line, an auxiliary lead line and a first pattern, and the output lead line, auxiliary lead line and first pattern are sequentially disposed along a first direction on an output portion of the connection unit, an end portion of the first pattern is disposed on a first side of the connection unit, at least a portion of the auxiliary lead line is disposed on an input portion of the connection unit.

Provided in the present specification is a novel structured semiconductor light-emitting element capable of preventing an electrode forming failure due to an arrangement error occurring during assembly or transfer of semiconductor light-emitting elements on a substrate, when a display device is implemented using the semiconductor light-emitting elements, wherein at least one of a plurality of semiconductor light-emitting elements according to one embodiment of the present disclosure comprises: a first conductive type semiconductor layer; a second conductive type semiconductor layer located on the first conductive type semiconductor layer; an active layer arranged between the first conductive type semiconductor layer and the second conductive type semiconductor layer; a second conductive type electrode located on the second conductive type semiconductor layer; and a first conductive type electrode located on at least a one-side stepped portion of the first conductive type semiconductor layer exposed by etching a portion of the second conductive type semiconductor layer and the active layer.

A method for manufacturing a display device can include forming an assembly electrode on a substrate; applying an insulating layer on the assembly electrode; disposing a partition wall on the insulating layer; defining an assembly groove in the partition wall; providing an light emitting diode (LED) having an assembly face corresponding to a shape of the assembly groove in the partition wall; and assembling the assembly face of the LED into the assembly groove in the partition wall, in which the LED includes a first electrode, a first semiconductor layer, an active layer, a second semiconductor layer, and a second electrode stacked in a first direction to form a stacked structure.

A semiconductor package carrier board, a method for fabricating the same, and an electronic package having the same are provided. The method includes forming on a circuit structure a graphene layer that acts as an insulation heat dissipating layer. Since the heat conductivity of the graphene layer is far greater than the heat conductivity of ink (about 0.4 W/m.Math.k), which is used as solder resist, the heat of the semiconductor package carrier board can be conducted quickly, and thus can avoid the problem that the heat will be accumulated on the semiconductor package carrier board.

A semiconductor package carrier board, a method for fabricating the same, and an electronic package having the same are provided. The method includes forming on a circuit structure a graphene layer that acts as an insulation heat dissipating layer. Since the heat conductivity of the graphene layer is far greater than the heat conductivity of ink (about 0.4 W/m.Math.k), which is used as solder resist, the heat of the semiconductor package carrier board can be conducted quickly, and thus can avoid the problem that the heat will be accumulated on the semiconductor package carrier board.

Provided is an electronic package, including a first substrate of a first conductive structure and a second substrate of a second conductive structure, where a first conductive layer, a bump body and a metal auxiliary layer of the first conductive structure are sequentially formed on the first substrate, and a metal pillar, a second conductive layer, a metal layer and a solder layer of the second conductive structure are sequentially formed on the second substrate, such that the solder layer is combined with the bump body and the metal auxiliary layer to stack the first substrate and the second substrate.

Provided is an electronic package, including a first substrate of a first conductive structure and a second substrate of a second conductive structure, where a first conductive layer, a bump body and a metal auxiliary layer of the first conductive structure are sequentially formed on the first substrate, and a metal pillar, a second conductive layer, a metal layer and a solder layer of the second conductive structure are sequentially formed on the second substrate, such that the solder layer is combined with the bump body and the metal auxiliary layer to stack the first substrate and the second substrate.