An objective of the present invention is to provide a sinterable bonding material excellent in sinterability. The present invention relates to a sinterable bonding material comprising a silver filler and an organic base compound as a sintering promoter.

A method of manufacturing a semiconductor device having a semiconductor die within an extended substrate and a bottom substrate may include bonding a bottom surface of a semiconductor die to a top surface of a bottom substrate, forming an adhering member to a top surface of the semiconductor die, bonding an extended substrate to the semiconductor die and to the top surface of the bottom substrate utilizing the adhering member and a conductive bump on a bottom surface of the extended substrate and a conductive bump on the bottom substrate. The semiconductor die and the conductive bumps may be encapsulated utilizing a mold member. The conductive bump on the bottom surface of the extended substrate may be electrically connected to a terminal on the top surface of the extended substrate. The adhering member may include a laminate film, a non-conductive film adhesive, or a thermal hardening liquid adhesive.

A method of manufacturing a semiconductor device having a semiconductor die within an extended substrate and a bottom substrate may include bonding a bottom surface of a semiconductor die to a top surface of a bottom substrate, forming an adhering member to a top surface of the semiconductor die, bonding an extended substrate to the semiconductor die and to the top surface of the bottom substrate utilizing the adhering member and a conductive bump on a bottom surface of the extended substrate and a conductive bump on the bottom substrate. The semiconductor die and the conductive bumps may be encapsulated utilizing a mold member. The conductive bump on the bottom surface of the extended substrate may be electrically connected to a terminal on the top surface of the extended substrate. The adhering member may include a laminate film, a non-conductive film adhesive, or a thermal hardening liquid adhesive.

A bonding structure bonds a Cu wiring line and a device electrode with each other. The bonding structure is arranged between the Cu wiring line and the device electrode, and comprises a first intermetallic compound (IMC) layer (a layer of an intermetallic compound of Cu and Sn) formed on the interface with the Cu wiring line, a second intermetallic compound (IMC) layer (a layer of an intermetallic compound of Cu and Sn) formed on the interface with the device electrode, and an intermediate layer that is present between the intermetallic compound layers. In the intermediate layer, a network-like IMC (a network-like intermetallic compound of Cu and Sn) is present in Sn.

A bonding structure bonds a Cu wiring line and a device electrode with each other. The bonding structure is arranged between the Cu wiring line and the device electrode, and comprises a first intermetallic compound (IMC) layer (a layer of an intermetallic compound of Cu and Sn) formed on the interface with the Cu wiring line, a second intermetallic compound (IMC) layer (a layer of an intermetallic compound of Cu and Sn) formed on the interface with the device electrode, and an intermediate layer that is present between the intermetallic compound layers. In the intermediate layer, a network-like IMC (a network-like intermetallic compound of Cu and Sn) is present in Sn.

A method and structure for packaging a semiconductor device are provided. In an embodiment a first substrate is bonded to a second substrate, which is bonded to a third substrate. A thermal interface material is placed on the second substrate prior to application of an underfill material. A ring can be placed on the thermal interface material, and an underfill material is dispensed between the second substrate and the third substrate. By placing the thermal interface material and ring prior to the underfill material, the underfill material cannot interfere with the interface between the thermal interface material and the second substrate, and the thermal interface material and ring can act as a physical barrier to the underfill material, thereby preventing overflow.

A method and structure for packaging a semiconductor device are provided. In an embodiment a first substrate is bonded to a second substrate, which is bonded to a third substrate. A thermal interface material is placed on the second substrate prior to application of an underfill material. A ring can be placed on the thermal interface material, and an underfill material is dispensed between the second substrate and the third substrate. By placing the thermal interface material and ring prior to the underfill material, the underfill material cannot interfere with the interface between the thermal interface material and the second substrate, and the thermal interface material and ring can act as a physical barrier to the underfill material, thereby preventing overflow.

A semiconductor device includes a substrate, a semiconductor element and a tin-based solder layer. The semiconductor element faces the substrate in a normal direction of the substrate. The normal direction corresponds to a normal line of the substrate. The tin-based solder layer joins the semiconductor element to the substrate. The tin-based solder layer a central portion and a peripheral portion surrounding the central portion. The tin-based solder layer has a tin crystal with a C-axis at each of the central portion and the peripheral portion. The C-axis at the central portion intersects the normal line at an angle larger than 45 degrees with respect to the normal line. The C-axis at the peripheral portion either intersects the normal line at an angle smaller than or equal to 45 degrees with respect to the normal line, or is parallel to the normal line.

In a method of manufacturing a semiconductor device of one embodiment, support members and a film which is formed of a paste containing metal particles and surrounds the support members are provided above a surface of a base. Then a semiconductor element is provided above the support members and the film. Subsequently, the film is sintered to join the base and the semiconductor element. The support members are formed of a metal which melts at a temperature equal to or below a sintering temperature of the metal particles contained in the paste. The support members support the semiconductor element after the semiconductor element is provided above the support members and the film.

A semiconductor device includes an insulated circuit board in which a metal layer is formed on one surface of an insulating board and a semiconductor element having a polygonal shape when viewed in a plan view that is bonded to the metal layer via a bonding material. The metal layer of the insulated circuit board has a recess that exposes the insulating board at a position corresponding to at least one corner of the semiconductor element.