A semiconductor device includes a first adsorption layer, a first bonding layer, a second bonding layer, and a second adsorption layer stacked on a first substrate, and a conductive pattern structure penetrating through the first adsorption layer, the first bonding layer, the second bonding layer and the second adsorption layer. The first and second bonding layers are in contact with each other, and each of the first and second adsorption layers includes a low-K dielectric material.

A silver sintering preparation comprising: (A) 30 to 88 wt.-% of silver flake particles having a mean particle diameter (d.sub.50) in the range of >1 to 20 m, (B) 5 to 30 wt.-% of at least one silver precursor, (C) 1 to 10 wt.-% of an organic polymer system, and (D) 6 to 30 wt.-% of organic solvent,
wherein the organic polymer system (C) is chemically essentially stable at temperatures <300 C. and forms a continuous phase together with the organic solvent (D).

Disclosed herein is a method of forming an electrical connecting structure having nano-twins copper. The method includes the steps of (i) forming a first nano-twins copper layer including a plurality of nano-twins copper grains; (ii) forming a second nano-twins copper layer including a plurality of nano-twins copper grains; and (iii) joining a surface of the first nano-twins copper layer with a surface of the second nano-twins copper layer, such that at least a portion of the first nano-twins copper grains grow into the second nano-twins copper layer, or at least a portion of the second nano-twins copper grains grow into the first nano-twins copper layer. An electrical connecting structure having nano-twins copper is provided as well.

A method of liquid assisted bonding includes: forming a structure with a liquid layer between an electrode of a device and a contact pad of a substrate, and two opposite surfaces of the liquid layer being respectively in contact with the electrode and the contact pad in which hydrogen bonds are formed between the liquid layer and at least one of the electrode and the contact pad; and evaporating the liquid layer to break said hydrogen bonds such that at least one of a surface of the electrode facing the contact pad and a surface of the contact pad facing the electrode is activated so as to assist a formation of a diffusion bonding between the electrode of the device and the contact pad in which a contact area between the electrode and the contact pad is smaller than or equal to about 1 square millimeter.

A flexible three-dimensional electronic device includes a polymer layer having a first side and a second side that is opposite of the first side. A first flexible substrate carrying a first electronic component is arranged on the first side of the polymer layer. A second flexible substrate carries a second electronic component. The second flexible substrate is a flexible silicon substrate arranged on the second side of the polymer layer. An electrically conductive via passes through the polymer layer to electrically connect the first and second electronic components.

After a die bonding step, a wire bonding step is performed to electrically connect the plurality of pad electrodes and the plurality of leads of the semiconductor chip via a plurality of copper wires. A plating layer is formed on a surface of the lead, and a copper wire is connected to the plating layer in the wire bonding step. The plating layer is a silver plating layer. After the die bonding step, an oxygen plasma treatment is performed on the lead frame and the semiconductor chip before the wire bonding step, and then the surface of the plating layer is reduced.

A method for manufacturing a semiconductor structure includes: forming a first bonding layer on a device substrate formed with a semiconductor device so as to cover the semiconductor device, wherein the first bonding layer includes a first metal oxide material in an amorphous state; forming a second bonding layer on a carrier substrate, wherein the second bonding layer includes a second metal oxide material in an amorphous state; conducting a surface modification process on the first bonding layer and the second bonding layer; bonding the device substrate and the carrier substrate to each other through the first and second bonding layers; and annealing the first and second bonding layers so as to convert the first and second metal oxide materials from the amorphous state to a crystalline state.

An integrated circuit structure includes a semiconductor substrate, and a dielectric pad extending from a bottom surface of the semiconductor substrate up into the semiconductor substrate. A low-k dielectric layer is disposed underlying the semiconductor substrate. A first non-low-k dielectric layer is underlying the low-k dielectric layer. A metal pad is underlying the first non-low-k dielectric layer. A second non-low-k dielectric layer is underlying the metal pad. An opening extends from a top surface of the semiconductor substrate down to penetrate through the semiconductor substrate, the dielectric pad, and the low-k dielectric layer, wherein the opening lands on a top surface of the metal pad. A passivation layer includes a portion on a sidewall of the opening, wherein a portion of the passivation layer at a bottom of the opening is removed.

In an embodiment, a package includes an encapsulant laterally surrounding a first integrated circuit device and a second integrated circuit device, wherein the first integrated circuit device includes a die and a heat dissipation structure over the die; a sealant disposed over the heat dissipation structure; an adhesive disposed over the second integrated circuit device; and a lid disposed over the sealant and the adhesive, wherein the lid includes a first cooling passage and a second cooling passage, the first cooling passage including an opening at a bottom of the lid and aligned to the heat dissipation structure, the second cooling passage including channels aligned to the second integrated circuit device and being distant from the bottom of the lid.

A micro-bonding structure including a substrate, a conductive pad, a bonding layer, a micro device, and a diffusive bonding portion is provided. The conductive pad is on the substrate. The bonding layer is on the conductive pad. A thickness of the bonding layer ranges from about 0.2 m to about 2 m. The micro device is on the bonding layer. The diffusive bonding portion is between and electrically connected with the bonding layer and the conductive pad. The diffusive bonding portion consists of at least a part of elements from the bonding layer and at least a part of elements from the conductive pad. A plurality of voids are between the bonding layer and the conductive pad, and one of the voids is bounded by the diffusive bonding portion and at least one of the conductive pad and the bonding layer.