Patent classifications
H01L2224/83379
Low stress bonding of silicon or germanium parts
A method includes providing a first part, a second part and a bonding material between the first part and the second part. The first part and the second part are made of a first material selected from a group consisting of silicon and germanium. The bonding material includes a second material that is different than the first material. The method includes arranging the first part, the bonding material, and the second part in a furnace; and creating a bonded part by heating the first part, the second part and the bonding material to a predetermined temperature for a predetermined period followed by a predetermined solidification period. The predetermined temperature is greater than 1.5 times a eutectic temperature of an alloy including the first material and the second material and less than a melting temperature of the first material.
Fabrication method of a stack of electronic devices
This method comprises the following steps: a) providing a first structure successively comprising a first substrate, a first electronic device, and a first dielectric layer; a second structure successively comprising a second substrate, an active layer, a second dielectric layer, and a polycrystalline semiconductor layer, the active layer being designed to form a second electronic device; b) bombarding the polycrystalline semiconductor layer by a beam of species configured to form an amorphous part and to preserve a superficial polycrystalline part; c) bonding the first and second structures; d) removing the second substrate of the second structure; e) introducing dopants into the amorphous part, through the exposed active layer; f) thermally activating the dopants by recrystallization of the amorphous part.
FABRICATION METHOD OF A STACK OF ELECTRONIC DEVICES
This method comprises the following steps: a) providing a first structure successively comprising a first substrate, a first electronic device, and a first dielectric layer; a second structure successively comprising a second substrate, an active layer, a second dielectric layer, and a polycrystalline semiconductor layer, the active layer being designed to form a second electronic device; b) bombarding the polycrystalline semiconductor layer by a beam of species configured to form an amorphous part and to preserve a superficial polycrystalline part; c) bonding the first and second structures; d) removing the second substrate of the second structure; e) introducing dopants into the amorphous part, through the exposed active layer; f) thermally activating the dopants by recrystallization of the amorphous part.
CLIP
There is disclosed a clip for a semi-conductor device. At least part of the clip is formed from a metallic foam.