Patent classifications
H01L2224/83395
BONDING STRUCTURE, SEMICONDUCTOR DEVICE, AND BONDING STRUCTURE FORMATION METHOD
A bonded structure includes a semiconductor element, an electrical conductor and a sintered metal layer. The semiconductor element has an element obverse surface and an element reverse surface spaced apart from each other in a first direction and includes a reverse-surface electrode on the element reverse surface. The electrical conductor has a mount surface facing in a same direction as the element obverse surface and supports the semiconductor element with the mount surface facing the element reverse surface. The sintered metal layer bonds the semiconductor element to the electrical conductor and electrically connects the reverse-surface electrode and the electrical conductor. The mount surface includes a roughened area roughened by a roughening process. The sintered metal layer is formed on the roughened area.
SEMICONDUCTOR ELEMENT BONDING STRUCTURE, METHOD FOR PRODUCING SEMICONDUCTOR ELEMENT BONDING STRUCTURE, AND ELECTRICALLY CONDUCTIVE BONDING AGENT
A semiconductor element bonding structure capable of strongly bonding a semiconductor element and an object to be bonded and relaxing thermal stress caused by a difference in thermal expansion, by interposing metal particles and Ni between the semiconductor element and the object to be bonded, the metal particles having a lower hardness than Ni and having a micro-sized particle diameter. A plurality of metal particles 5 (aluminum (Al), for example) having a lower hardness than nickel (Ni) and having a micro-sized particle diameter are interposed between a semiconductor chip 3 and a substrate 2 to be bonded to the semiconductor chip 3, and the metal particles 5 are fixedly bonded by the nickel (Ni). Optionally, aluminum (Al) or an aluminum alloy (Al alloy) is used as the metal particles 5, and aluminum (Al) or an aluminum alloy (Al alloy) is used on the surface of the semiconductor chip 3 and/or the surface of the substrate 2.
ELECTRONIC DEVICE
An electronic device includes a substrate, a first pad disposed on the substrate, a second pad disposed opposite to the first pad, and a conductive particle disposed between the first pad and the second pad. The first pad has a recess, and a part of the conductive particle sinks in the recess.
ELECTRONIC DEVICE
An electronic device includes a first metal plate including a first wiring and a second wiring, an electronic component mounted on a lower surface of the first wiring so as to overlap the second wiring in plan view, a second metal plate including an electrode electrically connected to the lower surface of the first wiring, and an insulation layer filling a space between the first metal plate, the second metal plate, and the electronic component and covering the electronic component. The upper surface of the second wiring is exposed from the insulation layer.
Bonding structure on gold thin film
The present invention provides a bonding method (S1) which is capable of achieving a high adhesive force without carrying out any special treatment on the second member (14), even in a case where the first member (11) has a surface on which a gold thin film (12) is formed. The first member (11) is made of a material other than gold and has a surface on which the gold thin film (12) is formed. The bonding method (S1) includes the steps of: (S11) irradiating, with laser light, at least part of a specific region (12a) of the surface of the first member (11), so that a base of the thin film (12) is exposed in the at least part of the specific region (12a); and (S12) bonding the second member (14) to the specific region (12a) by use of an adhesive (13).
OPTICAL MODULE, OPTICAL COMMUNICATION DEVICE, AND MANUFACTURING METHOD THEREOF
An optical module includes a semiconductor chip, a first gold-tin layer formed over the semiconductor chip and having gold and tin as main components, a barrier layer formed over the first gold-tin layer, having slower diffusion velocity into tin than diffusion velocity of gold into tin, and having electric conductivity, a second gold-tin layer formed over the barrier layer and having gold and tin as main components, and an optical device provided over the second gold-tin layer.
ELECTRONIC PART MOUNTING SUBSTRATE AND METHOD FOR PRODUCING SAME
An electronic part mounting substrate includes: a metal plate 10 (for mounting thereon electronic parts) of aluminum or an aluminum alloy having a substantially rectangular planar shape, one major surface of the metal plate 10 being surface-processed so as to have a surface roughness of not less than 0.2 micrometers; a plating film 20 of nickel or a nickel alloy formed on the one major surface of the metal plate 10; an electronic part 14 bonded to the plating film 20 by a silver bonding layer 12 (containing a sintered body of silver); a ceramic substrate having a substantially rectangular planar shape, one major surface of the ceramic substrate 16 being bonded to the other major surface of the metal plate 10; and a radiating metal plate (metal base plate) 18 bonded to the other major surface of the ceramic substrate 16.
Electronic part mounting substrate and method for producing same
An electronic part mounting substrate includes: a metal plate 10 (for mounting thereon electronic parts) of aluminum or an aluminum alloy having a substantially rectangular planar shape, one major surface of the metal plate 10 being surface-processed so as to have a surface roughness of not less than 0.2 micrometers; a plating film 20 of nickel or a nickel alloy formed on the one major surface of the metal plate 10; an electronic part 14 bonded to the plating film 20 by a silver bonding layer 12 (containing a sintered body of silver); a ceramic substrate 16 having a substantially rectangular planar shape, one major surface of the ceramic substrate 16 being bonded to the other major surface of the metal plate 10; and a radiating metal plate (metal base plate) 18 bonded to the other major surface of the ceramic substrate 16.
SEMICONDUCTOR PACKAGE WITH NICKEL-SILVER PRE-PLATED LEADFRAME
A semiconductor package includes a pad and leads, the pad and leads including a base metal predominantly including copper, a first plated metal layer predominantly including nickel in contact with the base metal, and a second plated metal layer predominantly including silver in contact with the first plated metal layer. The first plated metal layer has a first plated metal layer thickness of 0.1 to 5 microns, and the second plated metal layer has a second plated metal layer thickness of 0.2 to 5 microns. The semiconductor package further includes an adhesion promotion coating predominantly including silver oxide in contact with the second plated metal layer opposite the first plated metal layer, a semiconductor die mounted on the pad, a wire bond extending between the semiconductor die and a lead of the leads, and a mold compound covering the semiconductor die and the wire bond.
WIRE BONDED SEMICONDUCTOR DEVICE PACKAGE
In a described example, an apparatus includes: a metal leadframe including a dielectric die support formed in a central portion of the leadframe, and having metal leads extending from the central portion, portions of the metal leads extending into the central portion contacted by the dielectric die support; die attach material over the dielectric die support; a semiconductor die mounted to the dielectric die support by the die attach material, the semiconductor die having bond pads on a device side surface facing away from the dielectric die support; electrical connections extending from the bond pads to metal leads of the leadframe; and mold compound covering the semiconductor die, the electrical connections, the dielectric die support, and portions of the metal leads, the mold compound forming a package body.