A display apparatus including a circuit board, at least one LED stack configured to emit light, electrode pads disposed on the at least one LED stack and electrically connected to the at least one LED stack, and electrodes disposed on the electrode pads and electrically connected to the electrode pads, respectively, in which each of the electrodes has a fixed portion that is fixed to one of the electrode pads and an extending portion that is spaced apart from the one of the electrode pads, and the electrodes include at least two metal layers having different thermal expansion coefficients from each other.

A display apparatus including a circuit board, at least one LED stack configured to emit light, electrode pads disposed on the at least one LED stack and electrically connected to the at least one LED stack, and electrodes disposed on the electrode pads and electrically connected to the electrode pads, respectively, in which each of the electrodes has a fixed portion that is fixed to one of the electrode pads and an extending portion that is spaced apart from the one of the electrode pads, and the electrodes include at least two metal layers having different thermal expansion coefficients from each other.

A jointing material includes: at least one type of element at 0.1 wt % to 30 wt %, the element being capable of forming a compound with each of tin and carbon; and tin at 70 wt % to 99.9 wt % as a main component.

A jointing material includes: at least one type of element at 0.1 wt % to 30 wt %, the element being capable of forming a compound with each of tin and carbon; and tin at 70 wt % to 99.9 wt % as a main component.

Semiconductor packages may include a semiconductor chip on a substrate and an under-fill layer between the semiconductor chip and the substrate. The semiconductor chip may include a semiconductor substrate including first and second regions, and an interlayer dielectric layer that may cover the semiconductor substrate and may include connection lines. First conductive pads may be on the first region and may be electrically connected to some of the connection lines. Second conductive pads may be on the second region and may be electrically isolated from all of the connection lines. The semiconductor chip may also include a passivation layer that may cover the interlayer dielectric layer and may include holes that may expose the first and second conductive pads, respectively. On the second region, the under-fill layer may include a portion that may be in one of the first holes and contact one of the second conductive pads.

Semiconductor packages may include a semiconductor chip on a substrate and an under-fill layer between the semiconductor chip and the substrate. The semiconductor chip may include a semiconductor substrate including first and second regions, and an interlayer dielectric layer that may cover the semiconductor substrate and may include connection lines. First conductive pads may be on the first region and may be electrically connected to some of the connection lines. Second conductive pads may be on the second region and may be electrically isolated from all of the connection lines. The semiconductor chip may also include a passivation layer that may cover the interlayer dielectric layer and may include holes that may expose the first and second conductive pads, respectively. On the second region, the under-fill layer may include a portion that may be in one of the first holes and contact one of the second conductive pads.

A method for the transfer of components from a sender substrate to a receiver substrate includes provision and/or production of the components on the sender substrate, transfer of the components of the sender substrate to the transfer substrate, and transfer of the components from the transfer substrate to the receiver substrate.The components can be transferred selectively by means of bonding means and/or debonding means.

A method for the transfer of components from a sender substrate to a receiver substrate includes provision and/or production of the components on the sender substrate, transfer of the components of the sender substrate to the transfer substrate, and transfer of the components from the transfer substrate to the receiver substrate.The components can be transferred selectively by means of bonding means and/or debonding means.

Since the solder 106 temporarily remaining in the first region 301 is in a state of being high in curvature, it is in point contact with the semiconductor element 105 at the vertex of the solder 106. Thereafter, the solder 106 is gradually wetted and spread from the center part to the peripheral part and from the first region 301 to the second region 302 while the semiconductor element 105 is pressed against the solder 106. At this time, since the solder 106 wets and spreads while discharging air, generation of voids can be suppressed.

Since the solder 106 temporarily remaining in the first region 301 is in a state of being high in curvature, it is in point contact with the semiconductor element 105 at the vertex of the solder 106. Thereafter, the solder 106 is gradually wetted and spread from the center part to the peripheral part and from the first region 301 to the second region 302 while the semiconductor element 105 is pressed against the solder 106. At this time, since the solder 106 wets and spreads while discharging air, generation of voids can be suppressed.