In a method of manufacturing a semiconductor package, information with respect to a downward warpage of a reference package substrate, which may be bent with respect to a long axis and/or a short axis of the reference package substrate in applying heat to the reference package substrate to which a plurality of semiconductor chips may be attached using a die attach film (DAF), may be obtained. A package substrate, which may include a first surface to which the semiconductor chips may be attached using the DAF and a second surface opposite to the first surface, may be rotated with respect to the long axis or the short axis at an angle selected based on the information. The heat may be applied to the package substrate to cure the DAF and correct a warpage of the package substrate. Thus, warpage of the package substrate may be corrected for.

A method of batch soldering includes: forming a soldered joint between a metal region of a first semiconductor die and a metal region of a substrate using a solder preform via a soldering process which does not apply pressure directly to the first semiconductor die, the solder preform having a maximum thickness of 30 μm and a lower melting point than the metal regions; setting a soldering temperature of the soldering process so that the solder preform melts and fully reacts with the metal region of the first semiconductor die and the metal region of the substrate to form one or more intermetallic phases throughout the entire soldered joint, each intermetallic phase having a melting point above the preform melting point and the soldering temperature; and soldering a second semiconductor die to the same or different metal region of the substrate, without applying pressure directly to the second semiconductor die.

The present disclosure relates to a method for manufacturing a semiconductor package including vacuum-laminating a non-conductive film on a substrate on which a plurality of through silicon vias are provided and bump electrodes are formed, and then performing UV irradiation, wherein an increase in melt viscosity before and after UV irradiation can be adjusted to 30% or less, whereby a bonding can be performed without voids during thermo-compression bonding, and resin-insertion phenomenon between solders can be prevented, fillets can be minimized and reliability can be improved.

Methods for reducing heat transfer in semiconductor devices, and associated systems and devices, are described herein. In some embodiments, a method of manufacturing a semiconductor device includes forming a channel in a region of a substrate between a first die stack and a second die stack. The first die stack includes a plurality of first dies attached to each other by first film layers and the second die stack includes a plurality of second dies attached to each other by second film layers. The channel extends entirely through a thickness of the substrate. The method also includes applying heat to the first die stack to cure the first film layers. The channel reduces heat transfer from the first die stack to the second die stack.

Methods for attachment and devices produced using such methods are disclosed. In certain examples, the method comprises disposing a capped nanomaterial on a substrate, disposing a die on the disposed capped nanomaterial, drying the disposed capped nanomaterial and the disposed die, and sintering the dried disposed die and the dried capped nanomaterial at a temperature of 300° C. or less to attach the die to the substrate. Devices produced using the methods are also described.

A method for producing a stable sandwich arrangement of two components with solder situated therebetween, comprising the steps: (1) providing two components, each having at least one contact surface, and a free solder preform, (2) producing a sandwich arrangement of the components and a solder preform arranged between them and thus not yet connected to them by bringing into contact (i) each one of the contact surfaces, (ii) each of the single contact surface of the components or (iii) one of the contact surfaces of one component and a single contact surface of the other component, with the contact surfaces of the free solder preform, and (3) hot-pressing the sandwich arrangement produced in step (2) so as to form the stable sandwich arrangement at a temperature being at 10 to 40% below the melting temperature of the solder metal of the solder preform, expressed in ° C.

A semiconductor device manufacturing method includes a preparation step and a sinter bonding step. In the preparation step, a sinter-bonding work having a multilayer structure including a substrate, semiconductor chips, and sinter-bonding material layers is prepared. The semiconductor chips are disposed on, and will bond to, one side of the substrate. Each sinter-bonding material layer contains sinterable particles and is disposed between each semiconductor chip and the substrate. In the sinter bonding step, a cushioning sheet having a thickness of 5 to 5000 μm and a tensile elastic modulus of 2 to 150 MPa is placed on the sinter-bonding work, the resulting stack is held between a pair of pressing faces, and, in this state, the sinter-bonding work between the pressing faces undergoes a heating process while being pressurized in its lamination direction, to form a sintered layer from each sinter-bonding material layer.

Provided are an underfill material capable of realizing low-pressure mounting and voidless mounting, and a method for manufacturing a semiconductor device using the same. The underfill material includes a main composition containing an acrylic polymer, an acrylic monomer, and a maleimide compound, and the acrylic polymer is contained in a range of 10 parts by mass or more and 60 parts by mass or less in 100 parts by mass of the main composition, and the maleimide compound is contained in a range of 20 parts by mass or more and 70 parts by mass or less in 100 parts by mass of the main composition. Low-pressure mounting and the voidless mounting can be realized.

Provided are an underfill material capable of realizing low-pressure mounting and voidless mounting, and a method for manufacturing a semiconductor device using the same. The underfill material includes a main composition containing an acrylic polymer, an acrylic monomer, and a maleimide compound, and the acrylic polymer is contained in a range of 10 parts by mass or more and 60 parts by mass or less in 100 parts by mass of the main composition, and the maleimide compound is contained in a range of 20 parts by mass or more and 70 parts by mass or less in 100 parts by mass of the main composition. Low-pressure mounting and the voidless mounting can be realized.

This disclosure relates to a cascode HEMT semiconductor device including a lead frame, a die pad attached to the lead frame, and a HEMT die attached to the die pad. The HEMT die includes a HEMT source and a HEMT drain on a first side, and a HEMT gate on a second side. The device further includes a MOSFET die attached to the source of the HEMT die, and the MOSFET die includes a MOSFET source, a MOSFET gate and a MOSFET drain. The MOSFET drain is connected to the HEMT source, and the MOSFET source includes a MOSFET source clip. The MOSFET source clip includes a pillar so to connect the MOSFET source to the HEMT gate, and the connection between the MOSFET source to the HEMT gate is established by a conductive material.