A coating process of a coating liquid using a nozzle is performed on a coating target structure including a semiconductor element and a wire bonded to the semiconductor element by a wire bonding process. The nozzle has a transport wind generating function of generating a liquid transport wind in a spiral manner. Thus, the coating liquid discharged from the coating liquid supply port of the nozzle is supplied to the coating target structure along the directivity of the liquid transport wind. Then, a drying process is performed on the coating target structure to form a primary layer containing a silane coupling agent as a constituent material on an outer periphery of the wire.

Some embodiments relate to a three-dimensional (3D) integrated circuit (IC). The 3D IC includes a first IC die comprising a first semiconductor substrate, and a first interconnect structure over the first semiconductor substrate. The 3D IC also includes a second IC die comprising a second semiconductor substrate, and a second interconnect structure that separates the second semiconductor substrate from the first interconnect structure. A seal ring structure separates the first interconnect structure from the second interconnect structure and perimetrically surrounds a gas reservoir between the first IC die and second IC die. The seal ring structure includes a sidewall gas-vent opening structure configured to allow gas to pass between the gas reservoir and an ambient environment surrounding the 3D IC.

A method for manufacturing a display device includes checking a particle positioned between a display panel and a connecting member, irradiating a laser to an upper surface of the connecting member overlapping at least a part of the particle, removing the connecting member overlapping a region to which the laser is irradiated, removing the particle overlapping a region to which the laser is irradiated, and disposing a desiccant in a hole formed by removing the connecting member and the particle.

A semiconductor device in an embodiment includes a first chip on a substrate and a second chip adhered to a first region of the first chip using a first adhesive layer. The second chip is positioned so a second region of the first semiconductor is not overlapped. The first adhesive layer covers a lower surface of the second chip but not the second region. A third chip is adhered to a third region of the second chip with a second adhesive layer. The third chip is positioned so a fourth region of the second chip is not overlapped. The second adhesive layer covers a lower surface of the third chip but not the fourth region. An end of the second adhesive layer is above the second region, but not contacting. A coating covers the fourth region and the ends of the second adhesive layer and third chip.

A packaged semiconductor device includes a substrate and a contact pad disposed on the semiconductor substrate. The packaged semiconductor device also includes a dielectric layer disposed over the contact pad, the dielectric layer including a first opening over the contact pad, and an insulator layer disposed over the dielectric layer, the insulator layer including a second opening over the contact pad. The packaged semiconductor device also includes a molding material disposed around the substrate, the dielectric layer, and the insulator layer and a wiring over the insulator layer and extending through the second opening, the wiring being electrically coupled to the contact pad.

A packaged semiconductor device includes a substrate and a contact pad disposed on the semiconductor substrate. The packaged semiconductor device also includes a dielectric layer disposed over the contact pad, the dielectric layer including a first opening over the contact pad, and an insulator layer disposed over the dielectric layer, the insulator layer including a second opening over the contact pad. The packaged semiconductor device also includes a molding material disposed around the substrate, the dielectric layer, and the insulator layer and a wiring over the insulator layer and extending through the second opening, the wiring being electrically coupled to the contact pad.

A semiconductor device includes a substrate having a plurality of pads on a surface of the substrate, a semiconductor chip that includes a plurality of metal bumps connected to corresponding pads on the substrate, a first resin layer between the surface of the substrate and the semiconductor chip, a second resin layer between the substrate and the semiconductor chip and between the first resin layer and at least one of the metal bumps, and a third resin layer on the substrate and above the semiconductor chip.

Some embodiments relate to a three-dimensional (3D) integrated circuit (IC). The 3D IC includes a first IC die comprising a first semiconductor substrate, and a first interconnect structure over the first semiconductor substrate. The 3D IC also includes a second IC die comprising a second semiconductor substrate, and a second interconnect structure that separates the second semiconductor substrate from the first interconnect structure. A seal ring structure separates the first interconnect structure from the second interconnect structure and perimetrically surrounds a gas reservoir between the first IC die and second IC die. The seal ring structure includes a sidewall gas-vent opening structure configured to allow gas to pass between the gas reservoir and an ambient environment surrounding the 3D IC.

The present invention provides a semiconductor device including an insulating layer, a conductive layer bonded to one main surface of the insulating layer, a semiconductor element arranged such that the upper surface of the semiconductor element faces a direction same as the one main surface of the insulating layer, an upper electrode provided on the upper surface of the semiconductor element, a wiring member that has one end electrically bonded to the upper electrode of the semiconductor element and has another end electrically bonded to the conductive layer, and has a hollow portion, a first sealing material, and a second sealing material, in which the first sealing material seals at least part of the semiconductor element so as to be in contact with the semiconductor element, and the second sealing material seals the wiring member so as to be in contact with the wiring member.

A light emitting device includes a wavelength conversion layer, at least one light emitting unit and a reflective protecting element. The wavelength conversion layer has an upper surface and a lower surface opposite to each other. The light emitting unit has two electrode pads located on the same side of the light emitting unit. The light emitting unit is disposed on the upper surface of the wavelength conversion layer and exposes the two electrode pads. The reflective protecting element encapsulates at least a portion of the light emitting unit and a portion of the wavelength conversion layer, and exposes the two electrode pads of the light emitting unit.