Patent classifications
H01L2224/8392
Packaged semiconductor devices, methods of packaging semiconductor devices, and PoP devices
Packaged semiconductor devices, methods of packaging semiconductor devices, and package-on-package (PoP) devices are disclosed. In some embodiments, a method of packaging a semiconductor device includes forming through-package vias (TPVs) over a carrier, and coupling a semiconductor device to the carrier. The semiconductor device includes contact pads disposed on a surface thereof and an insulating material disposed over the contact pads. A molding material is formed over the carrier between the TPVs and the semiconductor device. Openings are formed in the insulating material using a laser drilling process over the contact pads, and a redistribution layer (RDL) is formed over the insulating material and the openings in the insulating material. A portion of the RDL is coupled to a top surface of each of the contact pads.
Method of manufacturing semiconductor package and semiconductor package
In a semiconductor package, surfaces of a die pad, a semiconductor element, a connecting member, and a lead are subjected to a surface treatment with a silane coupling agent. A first surface of a plurality of surfaces of the semiconductor device includes a first region where an organic substance is exposed, and a second region where an inorganic substance is exposed, the first surface being bonded with the connecting member. A bonding strength between the first region and the sealing resin is weaker than a bonding strength between the second region and the sealing resin.
LIGHT EMITTING DEVICE AND MANUFACTURING METHOD THEREOF
A light emitting device includes a wavelength conversion layer, at least one light emitting unit and a reflective protecting element. The wavelength conversion layer has an upper surface and a lower surface opposite to each other. The light emitting unit has two electrode pads located on the same side of the light emitting unit. The light emitting unit is disposed on the upper surface of the wavelength conversion layer and exposes the two electrode pads. The reflective protecting element encapsulates at least a portion of the light emitting unit and a portion of the wavelength conversion layer, and exposes the two electrode pads of the light emitting unit.
Semiconductor device
A semiconductor device includes: a first semiconductor element including a first face and a second face; a second semiconductor element including a third face and a fourth face; an insulating base member including a fifth face and a sixth face; a first wiring that penetrates through the insulating base member, and is disposed on the sixth face; a second wiring that penetrates through the insulating base member, and is disposed on the sixth face; a first wiring member that faces the second face; and a second wiring member that faces the sixth face, and is electrically connected to the second wiring. The second wiring member is bonded to the first and second wirings while the insulating base member is folded. A current flows in a first direction in the first wiring member, and flows in a second direction opposite to the first direction in the second wiring member.
CHIP BONDING APPARATUS FOR SEMICONDUCTOR PACKAGING AND SEMICONDUCTOR PACKAGING METHOD USING THE SAME
Disclosed are a chip bonding apparatus for semiconductor packaging and a semiconductor packaging method using the same. The chip bonding apparatus may include a bonding head, wherein the bonding head may include a plurality of chip holding units, each of which is configured to individually hold a chip, and the bonding head may be configured to adjust the interval between the plurality of chip holding units. The chip bonding apparatus may be configured to bond a plurality of chips to a given target surface at controlled intervals using the plurality of chip holding units according to a multi-chip bonding method. The semiconductor packaging method may include bonding chips to a target surface of a carrier substrate at controlled intervals using the plurality of chip holding units according to the multi-chip bonding method.