Patent classifications
H01L2224/84385
PACKAGED POWER ELECTRONIC DEVICE, IN PARTICULAR BRIDGE CIRCUIT COMPRISING POWER TRANSISTORS, AND ASSEMBLING PROCESS THEREOF
The device has a first support element forming a first thermal dissipation surface and carrying a first power component; a second support element forming a second thermal dissipation surface and carrying a second power component, a first contacting element superimposed to the first power component; a second contacting element superimposed to the second power component; a plurality of leads electrically coupled with the power components through the first and/or the second support elements; and a thermally conductive body arranged between the first and the second contacting elements. The first and the second support elements and the first and the second contacting elements are formed by electrically insulating and thermally conductive multilayers.
Die package component with jumper structure and manufacturing method thereof
A die package component with a jumper structure includes a first lead frame, a second lead frame, a die, a jumper structure and a package body. The first lead frame has a die connection surface. The second lead frame is separated to the first lead frame. The second lead frame has a lead frame connection groove which defines a thermal deformation tolerance allowable route. The jumper structure is thermally deformed in a thermal-variable environment. The jumper structure includes a die welding portion and a lead welding portion. The die welding portion is welded to the die. Upon meeting a thermal deformation, the lead welding portion would be movable welded along the thermal deformation tolerance allowable route to the lead frame connection groove.
SEMICONDUCTOR DEVICE
According to one embodiment, a semiconductor device includes a semiconductor chip, first and second conductive members, a first connection member, and a resin portion. The first conductive member includes first and second portions. The second portion is electrically connected to the semiconductor chip. A direction from the semiconductor chip toward the second portion is aligned with a first direction. A direction from the second portion toward the first portion is aligned with a second direction crossing the first direction. The second conductive member includes a third portion. The first connection member is provided between the first and third portion. The first connection member is conductive. The resin portion includes a first partial region. The first partial region is provided around the first and third portions, and the first connection member. The first portion has a first surface opposing the first connection member and including a recess and a protrusion.
SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor element, leads, and an encapsulation resin covering a portion of each of the leads and the semiconductor element. Each of the leads includes an external connection portion projecting from a side surface of the encapsulation resin. The external connection portion of at least one of the leads has opposite ends in a width-wise direction that extends along the side surface of the encapsulation resin. The external connection portion includes two recesses arranged toward a center in the width-wise direction from the opposite ends. The two recesses extend from a distal surface toward the encapsulation resin. The opposite ends in the width-wise direction define an end connection part. The external connection portion includes a part between the two recesses defining a center connection part.
Lead frame with conductive clip for mounting a semiconductor die with reduced clip shifting
A semiconductor assembly includes a semiconductor die comprising lower and upper electrical contacts. A lead frame having a lower die pad is electrically and mechanically connected to the lower electrical contact of the die. An upper conductive member has a first portion electrically and mechanically connected to the upper electrical contact of the die. A lead terminal has a surface portion electrically and mechanically connected to a second portion of the conductive member. The surface portion of the lead terminal and/or the second portion of the conductive member has a series of grooves disposed therein. Packaging material encapsulates the semiconductor die, at least a portion of the lead frame, at least a portion of the upper conducive member and at least a portion of the lead terminal.
DIE PACKAGE COMPONENT WITH JUMPER STRUCTURE AND MANUFACTURING METHOD THEREOF
A die package component with a jumper structure includes a first lead frame, a second lead frame, a die, a jumper structure and a package body. The first lead frame has a die connection surface. The second lead frame is separated to the first lead frame. The second lead frame has a lead frame connection groove which defines a thermal deformation tolerance allowable route. The jumper structure is thermally deformed in a thermal-variable environment. The jumper structure includes a die welding portion and a lead welding portion. The die welding portion is welded to the die. Upon meeting a thermal deformation, the lead welding portion would be movable welded along the thermal deformation tolerance allowable route to the lead frame connection groove.
DIE PACKAGE COMPONENT WITH JUMPER STRUCTURE AND MANUFACTURING METHOD THEREOF
A die package component with a jumper structure includes a first lead frame, a second lead frame, a die, a jumper structure and a package body. The first lead frame has a die connection surface. The second lead frame is separated to the first lead frame. The second lead frame has a lead frame connection groove which defines a thermal deformation tolerance allowable route. The jumper structure is thermally deformed in a thermal-variable environment. The jumper structure includes a die welding portion and a lead welding portion. The die welding portion is welded to the die. Upon meeting a thermal deformation, the lead welding portion would be movable welded along the thermal deformation tolerance allowable route to the lead frame connection groove.
Clip and related methods
Implementations of a clip for a semiconductor package may include: an electrically conductive clip having a first end and a second end and a middle section between the first end and the second end. The first end may be configured to couple to a first die through a bonding material. The second end may be configured to couple to a second die through a bonding material. The middle section may be configured to couple to an emitter structure through a bonding material. The clip may include an integrally formed electrically conductive material and include an M-shape. A middle of the M-shape may be coupled to the emitter structure.
Semiconductor device
The semiconductor device includes a semiconductor element, and an electro-conductive first plate-like part electrically connected to a top-face-side electrode of the semiconductor element and including a first joint part projecting from a side face, and an electro-conductive second plate-like part including a second joint part projecting from a side face. A bottom face of the first joint part and a top face of the second joint part face one another, and are electrically connected via an electro-conductive bonding material. A bonding-material-thickness ensuring means is provided in a zone where the bottom face of the first joint part and the top face of the second joint part face one another to ensure a thickness of the electro-conductive bonding material between an upper portion of a front end of the second joint part and the bottom face of the first joint part.
Manufacturing method for power semiconductor device, and power semiconductor device
An object of the invention is to provide: a manufacturing method for a highly reliable power semiconductor device which prevents breakage of an conductor pattern and an insulating layer, and has bonding strength higher than that by the conventional bonding between the electrode terminal and the conductor pattern; and that power semiconductor device. Breakage of the conductor pattern and the insulating layer is prevented due to inclusion of: a step of laying an electrode terminal on a protrusion provided on a conductor pattern placed on a circuit-face side of a ceramic board so that a center portion of a surface to be bonded of the electrode terminal makes contact with a head portion of the protrusion; a step of pressurizing and ultrasonically vibrating a surface opposite to the surface to be bonded, of the electrode terminal, using an ultrasonic horn, to thereby bond the electrode terminal to the conductor pattern.