A semiconductor die is disclosed. The semiconductor die includes a semiconductor body, a metallization over part of the semiconductor body and including a noble metal at a top surface of the metallization, a bondwire having a foot bonded to the top surface of the metallization, and a sealing material covering the foot of the bondwire, the top surface of the metallization, and one or more areas outside the top surface of the metallization where oxide and/or hydroxide-groups would be present if exposed to air. The sealing material adheres to the foot of the bondwire and the one or more areas outside the top surface of the metallization where the oxide and/or hydroxide-groups would be present if exposed to air.

A semiconductor package includes a package substrate, a semiconductor chip on the package substrate, the semiconductor chip including a logic chip and a memory stack structure on the logic chip, a connector and a connector terminal below the package substrate, a molding layer that covers the semiconductor chip, the molding layer having a recess region on a top surface of the molding layer, a housing that covers the molding layer, and an air gap on the semiconductor chip, the air gap being defined by the housing and the recess region of the molding layer, and the molding layer separating the air gap from the memory stack structure of the semiconductor chip.

A sensor lens assembly having a non-soldering configuration is provided. The sensor lens assembly includes a circuit board, an optical module fixed to the circuit board, a sensor chip and an extending wall both assembled to the circuit board, a plurality of wires electrically coupling the sensor chip and the circuit board, a supporting adhesive layer, and a light-permeable sheet. The extending wall surrounds the sensor chip and has an extending top surface that is substantially flush with a top surface of the sensor chip. The supporting adhesive layer is in a ringed shape and is disposed on the extending top surface of the extending wall and the top surface of the sensor chip. The light-permeable sheet is disposed on the supporting adhesive layer, so that the light-permeable sheet, the supporting adhesive layer, and the top surface of the sensor chip jointly define an enclosed space.

An electronic device includes a support member and a mount member mounting on the support member. The support member and the mount member are sealed by a resin member. The support member includes a surface having a laser irradiation mark. The mount member includes a surface having a rough portion with an accumulation of material of the support member.

A method for manufacturing a light emitting device includes: preparing a first substrate having an upper surface comprising an element placement region; placing a light emitting element in the element placement region; disposing an uncured, sheet-like light-transmissive member on the light emitting element and bringing an outer edge of a lower surface of the light-transmissive member into contact with an outer upper surface of the element placement region of the first substrate by pressing the light-transmissive member; and disposing a first protrusion portion along an outer edge of an upper surface of the light-transmissive member so that the first protrusion portion extends over the upper surface of the first substrate and the upper surface of the light-transmissive member.

A semiconductor package structure includes a carrier, an electronic device, a spacer, a transparent panel, and a conductive wire. The electronic device has a first surface and an optical structure on the first surface. The spacer is disposed on the first surface to enclose the optical structure of the electronic device. The transparent panel is disposed on the spacer. The conductive wire electrically connects the electronic device to the carrier and is exposed to air.

A semiconductor package may include a substrate including a first coupling terminal and a second coupling terminal, a first chip disposed on the substrate, the first chip including a first pad and a second pad, and a connection structure connecting the first coupling terminal to the first pad. A portion of the connection structure may be in contact with a first side surface of the first chip. The connection structure may include a connection conductor electrically connecting the first pad to the first coupling terminal.

A semiconductor device is extremely reliable because a sealant thereof is difficult to deteriorate even when a SiC semiconductor element is energized. The semiconductor device is produced by sealing a SiC semiconductor element 11 mounted on a multilayer substrate 12 and electrically conductive connection members 14 and 18 with a sealant 20 containing an ultraviolet light absorbent.

An electronic device includes an integrated circuit package including a die mounted on a die carrier, a mold structure at least partially encapsulating the mounted die, and a heat transfer chimney formed on the die. The heat transfer chimney extends at least partially through the mold structure to transfer heat away from the die. The heat transfer chimney is formed from a thermally conductive compound including thermally conductive nanoparticles.

A semiconductor package including: a redistribution layer including redistribution line patterns, redistribution vias connected to the redistribution line patterns, and a redistribution insulating layer surrounding the redistribution line patterns and the redistribution vias; semiconductor chips including at least one upper semiconductor chip disposed on a lowermost semiconductor chip of the semiconductor chips, wherein the at least one upper semiconductor chip is thicker than the lowermost semiconductor chip; bonding wires each having a first end and a second end, wherein the bonding wires connect the semiconductor chips to the redistribution layer, wherein the first end of each of the bonding wires is connected to a respective chip pad of the semiconductor chips and the second end of each of the bonding wires is connected to a respective one of the redistribution line patterns; and a molding member surrounding, on the redistribution layer, the semiconductor chips and the bonding wires.