The present disclosure relates to a method for manufacturing a semiconductor package including vacuum-laminating a non-conductive film on a substrate on which a plurality of through silicon vias are provided and bump electrodes are formed, and then performing UV irradiation, wherein an increase in melt viscosity before and after UV irradiation can be adjusted to 30% or less, whereby a bonding can be performed without voids during thermo-compression bonding, and resin-insertion phenomenon between solders can be prevented, fillets can be minimized and reliability can be improved.

A semiconductor device includes a semiconductor element having a surface on which a first electrode and a second electrode are disposed, a conductor plate having a surface facing the surface of the semiconductor element and electrically connected to the first electrode, an insulating layer disposed on the surface of the conductor plate and covers a part of the surface of the conductor plate, and a conductor circuit pattern disposed on the insulating layer. The conductor circuit pattern has at least one conductor line electrically connected to the semiconductor element. The at least one conductor line includes a conductor line electrically connected to the second electrode.

A display device includes a driving member which provides an electrical signal and includes a connection terminal which transmits the electrical signal, a pad electrode which receives the electrical signal from the driving member and is electrically connected to the connection terminal of the driving member, an organic layer on the pad electrode, the organic layer including a side surface defining an opening of the organic layer which exposes the pad electrode to outside the organic layer and within the opening, a protrusion protruding from the side surface, and a connection conductive layer which electrically connects the pad electrode to the connection terminal, within the opening of the organic layer, where the connection conductive layer covers each of the pad electrode which is exposed by the opening of the organic layer, the side surface of the organic layer, and the protrusion of the organic layer.

A display device comprises a display panel including a display area including pixels, and a pad area adjacent to the display area, and a driving integrated circuit mounted on the pad area, wherein the pad area includes a stud pad area located at an edge of the pad area and including at least one stud pad electrode, the driving integrated circuit includes a circuit base, and at least one stud bump area overlapping the stud pad area in a thickness direction of the display device and including at least one stud bump, and the at least one stud pad electrode overlaps an edge portion of the at least one stud bump.

According to one embodiment, in a semiconductor manufacturing apparatus, a controller relatively moves a bonding tool and a stage close to each other while causing a semiconductor chip to adhere by suction to a surface via a tape using at least a first suction structure in a first period. In a second period, the controller controls the temperature of the bonding tool to a first target temperature while keeping substantially equal to a target pressure a pressure applied to the semiconductor chip by the bonding tool. In a third period, the controller controls a relative distance between the bonding tool and the stage so that the pressure applied to the semiconductor chip by the bonding tool is kept equal to the target pressure and controls the temperature of the bonding tool to a second target temperature. The second target temperature is higher than the first target temperature.

According to one embodiment, in a semiconductor manufacturing apparatus, a controller relatively moves a bonding tool and a stage close to each other while causing a semiconductor chip to adhere by suction to a surface via a tape using at least a first suction structure in a first period. In a second period, the controller controls the temperature of the bonding tool to a first target temperature while keeping substantially equal to a target pressure a pressure applied to the semiconductor chip by the bonding tool. In a third period, the controller controls a relative distance between the bonding tool and the stage so that the pressure applied to the semiconductor chip by the bonding tool is kept equal to the target pressure and controls the temperature of the bonding tool to a second target temperature. The second target temperature is higher than the first target temperature.

Various embodiments may provide a semiconductor package. The semiconductor package may include a first electrical component, a second electrical component, a first heat sink, and a second heat sink bonded to a first package interconnection component and a second package interconnection component. The first package interconnection component and the second package interconnection component may provide lateral and vertical interconnections in the package.

Disclosed embodiments include an integrated circuit (IC) comprising a silicon wafer, first and second conductive lines on the silicon wafer. There are first, second and third insulation blocks with portions on the first and second conductive lines and the silicon wafer, a metal pillar on the surface of the first conductive line opposite the silicon wafer, and a conductive adhesive block on the surface of the second conductive line opposite the silicon wafer. The IC also has a lead frame having first and second leads, and a capacitor having first and second capacitor terminals in which the first capacitor terminal is connected to the second lead using conductive adhesive, the second capacitor terminal is connected to the second conductive line through the conductive adhesive block, and the first lead is coupled to the first conductive line.

The present invention has: a heater; and a bonding tool having a lower surface on which a memory chip is adsorbed; and an upper surface attached to the heater, and is provided with a bonding tool which presses the peripheral edge of the memory chip to a solder ball in a first peripheral area of the lower surface and which presses the center of the memory chip (60) to a DAF having a heat resistance temperature lower than that of the solder ball in a first center area. The amount of heat transmitted from the first center area to the center of the memory chip is smaller than that transmitted from the first peripheral area (A) to the peripheral edge of the memory chip. Thus, the bonding apparatus in which the center of a bonding member can be heated to a temperature lower than that at the peripheral edge can be provided.

The present invention has: a heater; and a bonding tool having a lower surface on which a memory chip is adsorbed; and an upper surface attached to the heater, and is provided with a bonding tool which presses the peripheral edge of the memory chip to a solder ball in a first peripheral area of the lower surface and which presses the center of the memory chip (60) to a DAF having a heat resistance temperature lower than that of the solder ball in a first center area. The amount of heat transmitted from the first center area to the center of the memory chip is smaller than that transmitted from the first peripheral area (A) to the peripheral edge of the memory chip. Thus, the bonding apparatus in which the center of a bonding member can be heated to a temperature lower than that at the peripheral edge can be provided.