The semiconductor device includes a semiconductor element, a first lead, and a second lead. The semiconductor element has an element obverse surface and an element reverse surface spaced apart from each other in a thickness direction. The semiconductor element includes an electron transit layer disposed between the element obverse surface and the element reverse surface and formed of a nitride semiconductor, a first electrode disposed on the element obverse surface, and a second electrode disposed on the element reverse surface and electrically connected to the first electrode. The semiconductor element is mounted on the first lead, and the second electrode is joined to the first lead. The second lead is electrically connected to the first electrode. The semiconductor element is a transistor. The second lead is spaced apart from the first lead and is configured such that a main current to be subjected to switching flows therethrough.

A system-in-package (SIP) incorporating die-in-die cavity packaging may include hybrid dies fabricated by milling or otherwise creating a cavity through the additive surfaces of a primary application specific integrated circuit (ASIC) die configured for flip-chip bonding and encapsulating a secondary die such as a Flash/non-volatile memory module, analog-digital converter (ADC), or other processing circuit into the cavity. The primary and secondary dies are then connected by the addition of redistribution layers. The resulting hybrid die may then be vertically integrated into the SIP along with additional memory modules or dies.

An embodiment method includes providing a wafer including a first integrated circuit die, a second integrated circuit die, and a scribe line region between the first integrated circuit die and the second integrated circuit die. The method further includes forming a kerf in the scribe line region and after forming the kerf, using a mechanical sawing process to fully separate the first integrated circuit die from the second integrated circuit die. The kerf extends through a plurality of dielectric layers into a semiconductor substrate.

A method of making a micro-module structure comprises providing a substrate, the substrate having a substrate surface and comprising a substrate post protruding from the substrate surface. A component is disposed on the substrate post, the component having a component top side and a component bottom side opposite the component top side, the component bottom side disposed on the substrate post. The component extends over at least one edge of the substrate post. One or more component electrodes are disposed on the component.

A semiconductor package includes a connection structure including an insulating layer, a redistribution layer disposed on the insulating layer, and a connection via penetrating through the insulating layer and connected to the redistribution layer, a semiconductor chip having an active surface on which connection pads are disposed and an inactive surface opposing the active surface, and having the active surface disposed on the connection structure to face the connection structure, and an encapsulant covering at least a portion of the semiconductor chip, wherein the semiconductor chip includes a groove formed in the active surface, and the groove has a shape in which a width of a region of at least a portion of an internal region located closer to a central portion of the semiconductor chip than the active surface is greater than a width of an entrance region.

A semiconductor package includes a connection structure, a semiconductor chip, and an encapsulant. The connection structure includes an insulating layer, a redistribution layer disposed on the insulating layer, and a connection via penetrating through the insulating layer and connected to the redistribution layer. The semiconductor chip has an active surface on which connection pads are disposed and an inactive surface opposing the active surface, and the active surface is disposed on the connection structure to face the connection structure. The encapsulant covers at least a portion of the semiconductor chip. The semiconductor chip includes a groove formed in the active surface and a dam structure disposed around the groove in the active surface.

An electronic component includes an electronic device including a substrate, and a wiring board including a conductor unit electrically connected to the electronic device and an insulation unit configured to support the conductor unit. The substrate includes a front surface including a first region, a back surface including a second region, and an end surface connecting the front surface and the back surface. The substrate further includes a first portion located between the first region and the second region and a second portion having a thickness smaller than that of the first portion. The insulation unit of the wiring board is located between a virtual plane surface located between the first region and the second region and the second portion.

Embodiments are directed to a package that includes an electric device having a recess. In one embodiment, the electric device is a sensor and the recess reduces signal drift of the sensor caused by thermal expansion of the package. In another embodiment, the recess is substantially filled with adhesive material, thus increasing adhesion between the electric device and a substrate of the package while at the same time allowing for lower adhesive fillets.

A semiconductor device includes: a semiconductor layer of silicon carbide including a plurality of layers disposed on a main surface side; an electrode layer that is one of the plurality of layers, wherein the electrode layer has an electrode connecting surface to which a conductive connecting member is connected, and the electrode layer is composed mainly of silver; and a first metal layer that is a layer, different from the electrode layer, among the plurality of layers, wherein the first metal layer has a first bonding surface bonded onto the electrode layer such that the electrode connecting surface is exposed to an outside, and a second bonding surface electrically connected to the semiconductor layer, and the first metal layer is composed mainly of titanium carbide.

An optical module includes a semiconductor chip, a first gold-tin layer formed over the semiconductor chip and having gold and tin as main components, a barrier layer formed over the first gold-tin layer, having slower diffusion velocity into tin than diffusion velocity of gold into tin, and having electric conductivity, a second gold-tin layer formed over the barrier layer and having gold and tin as main components, and an optical device provided over the second gold-tin layer.