H01L2924/10161

Semiconductor chips and semiconductor packages including the same

A semiconductor chip includes a substrate including a circuit area having a rectangular shape and a peripheral area surrounding the circuit area, a key area being overlapping a part of the circuit area and a part of the peripheral area, a plurality of drive circuit cells in the circuit area, and a conductive reference line on the peripheral area and extending in a first direction parallel to a first edge among four edges of the rectangular shape of the circuit area.

SEMICONDUCTOR DEVICE WITH DIE-SKIPPING WIRE BONDS

A semiconductor device is disclosed including a wire bonded die stack where the bond wires skip dies in the die stack to provide bond wires having a long length. In one example, the semiconductor dies are stacked on top of each other with offsets along two orthogonal axes so that the dies include odd numbered dies interspersed and staggered with respect to even numbered dies only one of the axes. Wire bonds may be formed between the odd numbered dies, skipping the even numbered dies, and wire bonds may be formed between the even numbered dies, skipping the odd numbered dies. The long length of the bond wires increases an inductance of the wire bonds relative to parasitic capacitance of the semiconductor dies, thereby increasing signal path bandwidth of the semiconductor device.

Electronic device

An electronic device has a substrate 5, a first electric element 91 provided on a first conductor layer 71, a second electric element 92 provided on the first electric element 91, and a connector 50 having a base end part 45 provided on a second conductor layer 72 and a head part 40 provided on a front surface electrode 92a of the second electric element 92 via a conductive adhesive 75. An area of the base end part 45 placed on the second conductor layer 72 is larger than an area of the head part 40 placed on the second electric element 92. The base end part 45 is located at a side of the substrate 5 compared with the head part 40, and a gravity center position of the connector 50 is at a side of the base end part 45 of the connector 50.

LIGHT-EMITTING STRUCTURE ALIGNMENT PRESERVATION IN DISPLAY FABRICATION
20200091386 · 2020-03-19 ·

Techniques are disclosed for forming a frame on the backplane comprising structures at least partially circumscribing or enclosing metal contacts on the backplane. In some embodiments, the frame may comprise a photoresist. The dimensions and structural integrity of the frame can help prevent misalignment and/or damage of physical obtrusions of light-emitting structures during a bonding process of the light-emitting structures to the backplane.

POWER DELIVERY FOR EMBEDDED INTERCONNECT BRIDGE DEVICES AND METHODS

A semiconductor device and associated methods are disclosed. In one example, dies are interconnected through a bridge in a substrate. A reference voltage stack extends over at least a portion of the interconnect bridge, and a passive component is coupled to the reference voltage stack. In one example, the passive component helps to reduce interference in the power supply to components in the semiconductor device, such as the dies and the interconnect bridge.

SEMICONDUCTOR DEVICE COMPRISING A RECESS AND METHOD OF FABRICATING THE SAME
20200051880 · 2020-02-13 · ·

A semiconductor device is disclosed. In one example, the semiconductor device comprises a die carrier comprising an X-shaped recess on a first surface of the die carrier; a semiconductor die arranged over the first surface of the die carrier and at least partly covering the X-shaped recess; and a coupling agent attaching the semiconductor die to the die carrier, wherein the coupling agent is at least partially arranged in the X-shaped recess. Each of the four arms of the X-shaped recess points towards a corner of the semiconductor die and extends over an outline of the semiconductor die in an orthogonal projection onto the first surface of the die carrier.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

The present invention provides a semiconductor device including an insulating layer, a conductive layer bonded to one main surface of the insulating layer, a semiconductor element arranged such that the upper surface of the semiconductor element faces a direction same as the one main surface of the insulating layer, an upper electrode provided on the upper surface of the semiconductor element, a wiring member that has one end electrically bonded to the upper electrode of the semiconductor element and has another end electrically bonded to the conductive layer, and has a hollow portion, a first sealing material, and a second sealing material, in which the first sealing material seals at least part of the semiconductor element so as to be in contact with the semiconductor element, and the second sealing material seals the wiring member so as to be in contact with the wiring member.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
20190393116 · 2019-12-26 ·

A semiconductor device includes a semiconductor chip having a passivation film, a stress relieving layer provided on the passivation film, and a groove formed in a periphery of a surface of the semiconductor chip, the groove being provided inside of an edge of the semiconductor chip, wherein the stress relieving layer is partly disposed in the groove.

Semiconductor device and method of manufacturing semiconductor device
11935872 · 2024-03-19 · ·

A semiconductor device includes: a wiring board, a chip stack provided above the wiring board and including a first semiconductor chip; a second semiconductor chip provided between the wiring board and the first semiconductor chip; a first adhesive layer provided between the first semiconductor chip and the second semiconductor chip and on the second semiconductor chip; and a sealing insulation layer including a first part and a second part, the first part covering the chip stack, and the second part extending between the wiring board and the first semiconductor chip.

Integrated Circuit Packages and Methods of Forming the Same
20240088093 · 2024-03-14 ·

In an embodiment, a method includes: attaching a package component to a package substrate, the package component includes: a first die being disposed over an interposer; a second die being disposed over the interposer and laterally adjacent to the first die; and an encapsulant being disposed around the first die and the second die; attaching a thermal interface material to the first die and the second die; and attaching a lid structure to the package substrate, the lid structure includes: a lid cap being disposed over the thermal interface material; and a plurality of lid feet connecting the lid cap to the package substrate, in a plan view the plurality of lid feet forming a discontinuous loop around the package component.