H01L2924/16251

Liquid cooling through conductive interconnect

Embodiments include semiconductor packages and cooling semiconductor packaging systems. A semiconductor package includes a second die on a package substrate, first dies on the second die, conductive bumps between the first dies and the second die, a cold plate and a manifold over the first dies, second die, and package substrate, and first openings in the manifold. The first openings are fluidly coupled through the conductive bumps. The semiconductor package may include a first fluid path through the first openings of the manifold, where a first fluid flows through the first fluid path. The semiconductor package may further include a second fluid path through second openings of the cold plate, where a second fluid flows through the second fluid path, and where the first and second fluids of the first and second fluid paths cool heat providing surfaces of the first dies, the second die, or the package substrate.

Semiconductor package
11515290 · 2022-11-29 · ·

A semiconductor package includes an upper substrate having a first surface and a second surface which are opposite to each other, a lower semiconductor chip disposed on the first surface of the upper substrate, a plurality of conductive pillars disposed on the first surface of the upper substrate at at least one side of the lower semiconductor chip, and an upper semiconductor chip disposed on the second surface of the upper substrate. The lower semiconductor chip and the plurality of conductive pillars are connected to the first surface of the upper substrate, and the upper semiconductor chip is connected to the second surface of the upper substrate.

Semiconductor package and method of fabricating the same

Disclosed are semiconductor packages and/or methods of fabricating the same. The semiconductor package comprises a substrate, a semiconductor chip on the substrate, and a molding layer. The semiconductor chip includes a circuit region and an edge region around the circuit region. The molding layer covers a sidewall of the semiconductor chip. The semiconductor chip includes a reforming layer on the edge region. A top surface of the reforming layer is coplanar with a top surface of the molding layer.

LIQUID METAL THERMAL INTERFACE
20220375817 · 2022-11-24 ·

Liquid metal thermal interface materials and their uses in electronics assembly are described. In one implementation, a semiconductor assembly includes: a semiconductor die; a heat exchanger; and a thermal interface material (TIM) alloy bonding the semiconductor die to the heat exchanger without using a separate metallization layer on a surface of the semiconductor die or a surface of the heat exchanger. The TIM alloy may be formed by placing a TIM material between the semiconductor die and the heat exchanger, the TIM material comprising a first liquid metal foam in touching relation with the surface of the semiconductor die, a second liquid metal foam in touching relation with the surface of the heat exchanger.

Antenna apparatus and antenna module

An antenna apparatus includes: a feed line; a first ground layer including surface disposed above or below the feed line and spaced apart from the feed line; and an antenna pattern electrically connected to an end of the feed line and configured to transmit and/or receive a radio frequency (RF) signal, wherein the first ground layer includes a first protruding region protruding in a first longitudinal direction of the surface toward the antenna pattern and at least partially overlapping the feed line above or below the feed line, and second and third protruding regions protruding in the first longitudinal direction from positions spaced apart from the first protruding region in opposite lateral directions of the surface.

Substrate thermal layer for heat spreader connection
11594463 · 2023-02-28 · ·

A semiconductor device package structure is provided. The semiconductor device package structure includes a substrate having a first layer over a second layer. The first layer may have greater thermal conductivity than the second layer. The semiconductor device package structure further includes one or more dies coupled to the substrate. A heat spreader may have a first section coupled to a first surface of a first die of the one or more dies, and a second section coupled to the first layer.

Semiconductor package with dummy MIM capacitor die

A semiconductor package including at least one functional die; at least one dummy die free of active circuit, wherein the dummy die comprises at least one metal-insulator-metal (MIM) capacitor; and a redistribution layer (RDL) structure interconnecting the MIM capacitor to the at least one functional die.

SEMICONDUCTOR PACKAGE
20230055812 · 2023-02-23 ·

A semiconductor package includes an upper substrate having a first surface and a second surface which are opposite to each other, a lower semiconductor chip disposed on the first surface of the upper substrate, a plurality of conductive pillars disposed on the first surface of the upper substrate at at least one side of the lower semiconductor chip, and an upper semiconductor chip disposed on the second surface of the upper substrate. The lower semiconductor chip and the plurality of conductive pillars are connected to the first surface of the upper substrate, and the upper semiconductor chip is connected to the second surface of the upper substrate.

Semiconductor Device and Method of Forming Bump Pad Array on Substrate for Ground Connection for Heat Sink/Shielding Structure

A semiconductor device has a substrate and plurality of first bumps formed over the substrate in an array. An array of second bumps is formed over the substrate on at least two sides of the first bumps. An electrical component is disposed over the first bumps. A package structure is disposed over the substrate and electrical component. The package structure has a horizontal member and legs extending from the horizontal member to form a cavity. The package structure is coupled to the array of second bumps. The package structure includes a material to operate as a heat sink or shielding layer. The shielding layer makes ground connection through the array of second bumps. The first bumps and second bumps have a similar height and width to form in the same manufacturing step. A protective layer, such as conductive epoxy, is disposed over the array of second bumps.

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE

A semiconductor package includes a substrate, a package structure, and a lid structure. The package structure is disposed on the substrate. The lid structure is disposed over substrate, wherein the lid structure includes a main body covering and surrounding the package structure and a plurality of rib portions protruded from the main body and extended toward the package structure.