H01L2924/18301

Electronic Device Package Having a Dielectric Layer and an Encapsulant
20170287880 · 2017-10-05 ·

A method for fabricating an electronic device package includes providing a carrier, disposing a semiconductor chip onto the carrier, the semiconductor chip having a contact pad on a main face thereof remote from the carrier, applying a contact element onto the contact pad, applying a dielectric layer on the carrier, the semiconductor chip, and the contact element, and applying an encapsulant onto the dielectric layer.

Semiconductor device

A semiconductor device according to the present invention includes a semiconductor chip, an electrode pad made of a metal material containing aluminum and formed on a top surface of the semiconductor chip, an electrode lead disposed at a periphery of the semiconductor chip, a bonding wire having a linearly-extending main body portion and having a pad bond portion and a lead bond portion formed at respective ends of the main body portion and respectively bonded to the electrode pad and the electrode lead, and a resin package sealing the semiconductor chip, the electrode lead, and the bonding wire, the bonding wire is made of copper, and the entire electrode pad and the entire pad bond portion are integrally covered by a water-impermeable film.

Method for manufacturing semiconductor device, and semiconductor device

A semiconductor device, includes a die pad that has a first main surface and a second main surface located on the opposite side of the first main surface; a lead arranged next to the die pad; a semiconductor chip that has a surface, a first electrode and a second electrode formed on the surface, and a reverse side located on the opposite side of the surface, and is mounted on a chip mounting area of the first main of the die pad; a first wire that electrically couples the first electrode of the semiconductor chip and the lead; a second wire that electrically couples the second electrode of the semiconductor chip and the die pad; and a sealed body that seals the semiconductor chip, the first wire, and the second wire.

Semiconductor device including antistatic die attach material

A semiconductor device includes a substrate, a semiconductor die, and an antistatic die attach material between the substrate and the semiconductor die. The antistatic die attach material includes a mixture of a nonconductive adhesive material and carbon black or graphite. In one example, the antistatic die attach material has a resistivity between 10.sup.1 Ω.Math.cm and 10.sup.10 Ω.Math.cm.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
20220037260 · 2022-02-03 ·

A semiconductor device A1 disclosed includes: a semiconductor element 10 having an element obverse face and element reverse face that face oppositely in a thickness direction z, with an obverse-face electrode 11 (first electrode 111) and a reverse-face electrode 12 respectively formed on the element obverse face and the element reverse face; a conductive member 22A opposing the element reverse face and conductively bonded to the reverse-face electrode 12; a conductive member 22B spaced apart from the conductive member 22A and electrically connected to the obverse-face electrode 11; and a lead member 51 having a lead obverse face 51a facing in the same direction as the element obverse face and connecting the obverse-face electrode 11 and the conductive member 22B. The lead member 51, bonded to the obverse-face electrode 11 via a lead bonding layer 321, includes a protrusion 521 protruding in the thickness direction z from the lead obverse face 51a. The protrusion 521 overlaps with the obverse-face electrode 11 as viewed in the thickness direction z. This configuration suppresses deformation of the connecting member to be pressed during sintering treatment.

SEMICONDUCTOR DEVICE PACKAGE AND METHOD FOR MANUFACTURING THE SAME

A semiconductor device package includes a substrate, a stacked structure and an encapsulation layer. The substrate includes a circuit layer, a first surface and a second surface opposite to the first surface. The substrate defines at least one cavity through the substrate. The stacked structure includes a first semiconductor die disposed on the first surface and electrically connected on the circuit layer, and at least one second semiconductor die stacked on the first semiconductor die and electrically connected to the first semiconductor die. The second semiconductor die is at least partially inserted into the cavity. The encapsulation layer is disposed in the cavity and at least entirely encapsulating the second semiconductor die.

METHOD FOR PRODUCING SEMICONDUCTOR DEVICE, SEMICONDUCTOR PACKAGE, AND METHOD FOR PRODUCING SEMICONDUCTOR PACKAGE
20220037206 · 2022-02-03 ·

A method for producing a semiconductor device includes dicing, at a scribe area of a semiconductor wafer, the semiconductor wafer into semiconductor chips including respective circuit areas formed on the semiconductor wafer, the scribe area being provided between the circuit areas and extending in a first direction in a plan view, wherein the scribe area includes a first area extending in the first direction and second areas including monitor pads and extending in the first direction and located on both sides of the first area, wherein the method includes removing at least portions of the monitor pads by emitting laser beam to the second areas before the dicing, and wherein, in the dicing, the semiconductor wafer is diced at the first area.

STRUCTURE AND METHOD FOR STABILIZING LEADS IN WIRE-BONDED SEMICONDUCTOR DEVICES

A semiconductor device having a leadframe including a pad (101) surrounded by elongated leads (110) spaced from the pad by a gap (113) and extending to a frame, the pad and the leads having a first thickness (115) and a first and an opposite and parallel second surface; the leads having a first portion (112) of first thickness near the gap and a second portion (111) of first thickness near the frame, and a zone (114) of reduced second thickness (116) between the first and second portions; the second surface (112a) of the first lead portions is coplanar with the second surface (111a) of the second portions. A semiconductor chip (220) with a terminal is attached the pad. A metallic wire connection (230) from the terminal to an adjacent lead includes a stitch bond (232) attached to the first surface of the lead.

Singulation method for semiconductor package with plating on side of connectors

A method of singulating semiconductor packages, the method comprising: providing a plurality of semiconductor dies coupled to a single common leadframe, wherein a molding compound at least partially encases the semiconductor dies and the leadframe; singulating the plurality of semiconductor dies, wherein the leadframe is at least partially cut between adjacent semiconductor dies, thereby forming exposed side surfaces on leads of the leadframe; and plating the exposed side surfaces of the leads with a plating material, wherein the plating material is a different material than the leads. In some embodiments, singulating the plurality of semiconductor dies comprises performing a full cut of the leadframe. In some embodiments, singulating the plurality of semiconductor dies comprises performing separate partial cuts of the leadframe.

Method of manufacturing substrate for chip packages and method of manufacturing chip package
09818714 · 2017-11-14 · ·

Provided are a method of manufacturing a substrate for chip packages and a method of manufacturing a chip package, the method of manufacturing the substrate including: forming a lower adhesive layer in a lower part of an insulation film; forming an upper adhesive layer in an upper part of the insulation film to form a base material; forming via holes in the base material; and forming a circuit pattern layer on the upper adhesive layer, so it is effective to improve adhesion power between the molding resin and the insulation film at the time of manufacturing a chip package later.