An optical filter includes a first loop mirror, a second loop mirror, a first waveguide optically coupled to the first loop mirror and the second loop mirror, a second waveguide optically coupled to the first loop mirror and the second loop mirror, a first access waveguide optically coupled to the first waveguide, a second access waveguide optically coupled to the second waveguide, and an output section, wherein the first loop mirror includes a first loop waveguide and a first multiplexer/demultiplexer, the second loop mirror includes a second loop waveguide and a second multiplexer/demultiplexer, the output section includes a third loop waveguide, a third multiplexer/demultiplexer, a third waveguide, and a fourth waveguide, the third loop waveguide optically coupled to the second loop waveguide and the third multiplexer/demultiplexer, the third waveguide and the fourth waveguide optically coupled to the third multiplexer/demultiplexer, and the output section.

An optoelectronic component is provided that includes a radiation-emitting semiconductor chip, which emits electromagnetic radiation from a radiation exit surface during operation, a carrier comprising at least two first contact points, and a cover including at least two second contact points, wherein the at least two first contact points and the at least two second contact points are electrically conductively and/or thermally conductively connected to one another by a first plurality of nanowires and a second plurality of nanowires, and the nanowires provide a mechanically stable connection between the carrier and the cover. In addition, a method for producing an optoelectronic component is provided.

A semiconductor laser including a waveguide having a core, a confinement layer to bury the core, and a metallization layer. The core includes an active core region. The confinement layer surrounds the core and includes a first confinement layer between the core and the semiconductor substrate below the core, a second confinement layer above the core, and a third confinement layer to either or both sides of the core. The metallization layer is located above the confinement layers and include a first metallization layer and a second metallization layer. The first metallization layer is in direct contact with the second confinement layer and the third confinement layer, while the second metallization layer is disposed above the first layer. The first metallization layer is tuned to have a plasmon resonance corresponding to a higher order mode with high loss.

Several VCSEL devices for long wavelength applications in wavelength range of 1200-1600 nm are described. These devices include an active region between a semiconductor DBR on a GaAs wafer and a dielectric DBR regrown on the active region. The active region includes multi-quantum layers (MQLs) confined between the active n-InP and p-InAlAs layers and a tunnel junction layer above the MQLs. The semiconductor DBR is fused to the bottom of the active region by a wafer bonding process. The design simplifies integrating the reflectors and the active region stack by having only one wafer bonding followed by regrowth of the other layers including the dielectric DBR. An air gap is fabricated either in an n-InP layer of the active region or in an air gap spacer layer on top of the semiconductor DBR. The air gap enhances optical confinement of the VCSEL. The air gap may also contain a grating.

Methods, devices and systems are described for enabling a series-connected, single chip vertical-cavity surface-emitting laser (VCSEL) array. In one aspect, the single chip includes one or more non-conductive regions one the conductive layer to produce a plurality of electrically separate conductive regions. Each electrically separate region may have a plurality of VCSEL elements, including an anode region and a cathode region connected in series. The chip is connected to a sub-mount with a metallization pattern, which connects each electrically separate region on the conductive layer in series. In one aspect, the metallization pattern connects the anode region of a first electrically separate region to the cathode region of a second electrically separate region. The metallization pattern may also comprise cuts that maintain electrical separation between the anode and cathode regions on each conductive layer region, and that align with the etched regions.

An optoelectronic component (1) is specified having: an optoelectronic semiconductor chip (2) which generates electromagnetic radiation during operation, and a metallic layer (3) which is arranged on the semiconductor chip (2), wherein an outer surface of the metallic layer (4) has a structuring (5), identification of the component (1) is made possible by means of the structuring (5), and the metallic layer (3) is formed continuously.

Furthermore, a method for producing an optoelectronic component (1) is specified.

A semiconductor device includes a substrate, a first type semiconductor structure, semiconductor columnar bodies between the substrate and the first type semiconductor structure, a first electrode and a second electrode. The first type semiconductor structure includes a first surface, a second surface opposite the first surface and away from the substrate, a first extension and a second extension respectively extending outward beyond the semiconductor columnar bodies. The first electrode and the second electrode are on the second surface of the first type semiconductor structure.

A method of manufacturing a semiconductor laser element includes: first dividing a substrate to produce a divided substrate including waveguides spaced apart in a second direction, the substrate being a substrate on which a nitride-based semiconductor laser stacking structure including waveguides extending in the first direction is formed; cleaving the divided substrate in the second direction to produce a semiconductor laser element including waveguides; and second dividing the semiconductor laser element in the first direction to remove an end portion of the semiconductor laser element in the second direction. The cleaving includes: forming, on the divided substrate, a cleavage lead-in groove extending in the second direction; and cleaving the divided substrate using the cleavage lead-in groove. In the second dividing, a portion including the cleavage lead-in groove is removed as the end portion of the semiconductor laser element in the second direction.

A device includes: a laminate including first and second regions adjacent to respective both sides of an isolation groove; a mesa stripe structure adjacent to the first region on the laminate and extending in the first direction; a bank structure adjacent to the second region on the laminate and extending in the first direction; and an electrode pattern. The isolation groove has an inner surface including a first wall surface adjacent to the first region, a second wall surface adjacent to the second region, and a bottom surface between the first and second regions. The ridge electrode extends from the side of the mesa stripe structure, along a second direction, toward the bank structure, and not beyond the second wall surface. The connection electrode is narrower in width in the first direction than any one of the ridge electrode and the pad electrode.

A light-emitting element includes a mesa structure in which a first compound semiconductor layer of a first conductivity type, an active layer, and a second compound semiconductor layer of a second conductivity type are disposed in that order, wherein at least one of the first compound semiconductor layer and the second compound semiconductor layer has a current constriction region surrounded by an insulation region extending inward from a sidewall portion of the mesa structure; a wall structure disposed so as to surround the mesa structure; at least one bridge structure connecting the mesa structure and the wall structure, the wall structure and the bridge structure each having the same layer structure as the portion of the mesa structure in which the insulation region is provided; a first electrode; and a second electrode disposed on a top face of the wall structure.