Provided is an electronic circuit including a resonant circuit configured to output a resonance voltage having a resonance frequency to a first node, and an oscillation circuit configured to output an oscillation voltage having a level changed according to a first current and a second current based on the resonance voltage received from the first node, wherein the first current is delivered between a first voltage supply terminal and a second node in a first time period, the second current is delivered between the second node and a second voltage supply terminal in a second time period, and a sum of a length of the first time period and a length of the second time period corresponds to the resonance frequency.

A transconductance controlling circuit is provided. The transconductance controlling circuit includes a resonance circuit, a negative-resistance unit-circuit and a transconductance boosting circuit. The resonance circuit generates an oscillation signal. The negative-resistance unit-circuit is coupled to a resonance circuit and includes a first transistor and a second transistor. The transconductance boosting circuit is coupled to the negative-resistance unit-circuit and includes a third transistor and a fourth transistor. A first drain of the first transistor is coupled to a third drain of the third transistor, a first gate of the first transistor is coupled to a third gate of the third transistor, the first gate of the first transistor is coupled to a second drain of the second transistor, and a first base of the first transistor is coupled to a fourth base of the fourth transistor and to a fourth source of the fourth transistor.

This disclosure provides systems and apparatuses for reducing flicker noise in output signals provided by a radio frequency (RF) amplifier. In some implementations, the RF amplifier may include a bias generator to provide one or more bias signals to control operating points of devices and circuits of the RF amplifier. The bias generator may include a feedback circuit to generate a current to attenuate flicker noise within the bias generator. In some implementations, the feedback circuit may receive a bias voltage and may generate the current based on a frequency of the bias voltage.

Certain aspects of the present disclosure provide methods and apparatus for reducing phase noise in voltage-controlled oscillators (VCOs). One example VCO generally includes a first resonant circuit comprising an inductor and a first variable capacitive element coupled in parallel with the inductor; and a second variable capacitive element coupled to a center tap of the inductor and further coupled to a reference voltage, wherein the center tap of the inductor is further coupled to a voltage source.

A differential Colpitts oscillator circuit is described which provides a larger tuning range, has better phase noise and uses less power than conventional differential Colpitts oscillator circuits. The circuit is characterized by a capacitive ladder in which only variable capacitor is used for tuning the circuit. In some embodiments, a variable capacitor can be used for fine tuning.

A differential Colpitts oscillator circuit is described which has center-tapped inductors which are cross-coupled with gates of second transistors of first and second transistor pairs which can reduce the minimum power supply voltage and the bias voltage for the circuit. In addition, a capacitive ladder can be implemented which also has the potential benefit of increased tuning range.

A first tuning circuit tunes an oscillation frequency by changing, based on a first control signal, capacitance values of variable capacitive elements connected in parallel to an inductor. A second tuning circuit switches capacitive elements in and out of parallel connection with the inductor by turning on and off a transistor based on a second control signal, to thereby tune the oscillation frequency. A switching circuit includes n-channel transistors whose drains are connected via resistor elements to the source or drain of the transistor and a power and whose sources are grounded, and changes a bias voltage of the second tuning circuit by turning on and off the n-channel transistors based on the second control signal.

In a PLL circuit, a multi-band control oscillator includes multiple bands gradually increasing or decreasing a frequency in accordance with a control signal and being separated from each other, is capable of selectively switching one band among the multiple bands, and generates a signal of a frequency corresponding to the control signal in the band that is switched as a reference signal. A band setting unit sets the band of the multi-band control oscillator. The band setting unit sets the band for a present or subsequent time after a control command generator finishes outputting the control command to gradually increase or decrease from a previous start frequency to a previous stop frequency and before the control command generator starts outputting the control command to gradually increase or decrease from a present start frequency.

An example oscillator device comprises (i) an oscillation circuit arranged for generating and outputting an oscillation signal and comprising an active circuit to ensure oscillation is maintained, (ii) a voltage-to-current conversion replica circuit of the active circuit arranged for receiving the oscillation signal and for outputting a current proportional to the oscillation signal, (iii) biasing means arranged to generate a constant bias current to activate the oscillation circuit, and (iv) subtraction means for subtracting the current proportional to the oscillation signal from the bias current, thereby obtaining a resulting current which can be used for adapting the oscillation signal's amplitude.

According to one embodiment, there is provided a semiconductor device including a first switch, a first capacitive element, a second capacitive element, a first rectifying circuit, a second rectifying circuit, a third rectifying circuit, and a fourth rectifying circuit. The first switch is electrically inserted between a first node and a second node. The first capacitive element is electrically inserted between a first signal node and the first node. The second capacitive element is electrically inserted between a second signal node and the second node. The first rectifying circuit is electrically connected to the first node with a first polarity. The second rectifying circuit is electrically connected to the first node with a second polarity opposite to the first polarity. The third rectifying circuit is electrically connected to the second node with the first polarity. The fourth rectifying circuit is electrically connected to the second node with the second polarity.